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authorHong Xu <hong.xu@atmel.com>2012-04-17 02:26:29 -0400
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-04-27 13:40:27 -0400
commitcce783c608fee0716cff65926d1835a5fd097b69 (patch)
tree14842d65a25839c31cf4e99ded0410d569f1a4aa /arch/arm/boot/dts/at91sam9n12.dtsi
parent74db4fb93e4ed4d6241bf0f28e4b5d68a7a05577 (diff)
ARM: at91: Add DT description files for AT91SAM9N12-EK
Added AT91SAM9N12 SoC DT file, as well as the board definition .dts file for AT91SAM9N12-EK. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9n12.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi221
1 files changed, 221 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
new file mode 100644
index 000000000000..cb84de791b5a
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -0,0 +1,221 @@
1/*
2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10/include/ "skeleton.dtsi"
11
12/ {
13 model = "Atmel AT91SAM9N12 SoC";
14 compatible = "atmel,at91sam9n12";
15 interrupt-parent = <&aic>;
16
17 aliases {
18 serial0 = &dbgu;
19 serial1 = &usart0;
20 serial2 = &usart1;
21 serial3 = &usart2;
22 serial4 = &usart3;
23 gpio0 = &pioA;
24 gpio1 = &pioB;
25 gpio2 = &pioC;
26 gpio3 = &pioD;
27 tcb0 = &tcb0;
28 tcb1 = &tcb1;
29 };
30 cpus {
31 cpu@0 {
32 compatible = "arm,arm926ejs";
33 };
34 };
35
36 memory {
37 reg = <0x20000000 0x10000000>;
38 };
39
40 ahb {
41 compatible = "simple-bus";
42 #address-cells = <1>;
43 #size-cells = <1>;
44 ranges;
45
46 apb {
47 compatible = "simple-bus";
48 #address-cells = <1>;
49 #size-cells = <1>;
50 ranges;
51
52 aic: interrupt-controller@fffff000 {
53 #interrupt-cells = <2>;
54 compatible = "atmel,at91rm9200-aic";
55 interrupt-controller;
56 reg = <0xfffff000 0x200>;
57 };
58
59 ramc0: ramc@ffffe800 {
60 compatible = "atmel,at91sam9g45-ddramc";
61 reg = <0xffffe800 0x200>;
62 };
63
64 pmc: pmc@fffffc00 {
65 compatible = "atmel,at91rm9200-pmc";
66 reg = <0xfffffc00 0x100>;
67 };
68
69 rstc@fffffe00 {
70 compatible = "atmel,at91sam9g45-rstc";
71 reg = <0xfffffe00 0x10>;
72 };
73
74 pit: timer@fffffe30 {
75 compatible = "atmel,at91sam9260-pit";
76 reg = <0xfffffe30 0xf>;
77 interrupts = <1 4>;
78 };
79
80 shdwc@fffffe10 {
81 compatible = "atmel,at91sam9x5-shdwc";
82 reg = <0xfffffe10 0x10>;
83 };
84
85 tcb0: timer@f8008000 {
86 compatible = "atmel,at91sam9x5-tcb";
87 reg = <0xf8008000 0x100>;
88 interrupts = <17 4>;
89 };
90
91 tcb1: timer@f800c000 {
92 compatible = "atmel,at91sam9x5-tcb";
93 reg = <0xf800c000 0x100>;
94 interrupts = <17 4>;
95 };
96
97 dma: dma-controller@ffffec00 {
98 compatible = "atmel,at91sam9g45-dma";
99 reg = <0xffffec00 0x200>;
100 interrupts = <20 4>;
101 };
102
103 pioA: gpio@fffff400 {
104 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
105 reg = <0xfffff400 0x100>;
106 interrupts = <2 4>;
107 #gpio-cells = <2>;
108 gpio-controller;
109 interrupt-controller;
110 };
111
112 pioB: gpio@fffff600 {
113 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
114 reg = <0xfffff600 0x100>;
115 interrupts = <2 4>;
116 #gpio-cells = <2>;
117 gpio-controller;
118 interrupt-controller;
119 };
120
121 pioC: gpio@fffff800 {
122 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
123 reg = <0xfffff800 0x100>;
124 interrupts = <3 4>;
125 #gpio-cells = <2>;
126 gpio-controller;
127 interrupt-controller;
128 };
129
130 pioD: gpio@fffffa00 {
131 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
132 reg = <0xfffffa00 0x100>;
133 interrupts = <3 4>;
134 #gpio-cells = <2>;
135 gpio-controller;
136 interrupt-controller;
137 };
138
139 dbgu: serial@fffff200 {
140 compatible = "atmel,at91sam9260-usart";
141 reg = <0xfffff200 0x200>;
142 interrupts = <1 4>;
143 status = "disabled";
144 };
145
146 usart0: serial@f801c000 {
147 compatible = "atmel,at91sam9260-usart";
148 reg = <0xf801c000 0x4000>;
149 interrupts = <5 4>;
150 atmel,use-dma-rx;
151 atmel,use-dma-tx;
152 status = "disabled";
153 };
154
155 usart1: serial@f8020000 {
156 compatible = "atmel,at91sam9260-usart";
157 reg = <0xf8020000 0x4000>;
158 interrupts = <6 4>;
159 atmel,use-dma-rx;
160 atmel,use-dma-tx;
161 status = "disabled";
162 };
163
164 usart2: serial@f8024000 {
165 compatible = "atmel,at91sam9260-usart";
166 reg = <0xf8024000 0x4000>;
167 interrupts = <7 4>;
168 atmel,use-dma-rx;
169 atmel,use-dma-tx;
170 status = "disabled";
171 };
172
173 usart3: serial@f8028000 {
174 compatible = "atmel,at91sam9260-usart";
175 reg = <0xf8028000 0x4000>;
176 interrupts = <8 4>;
177 atmel,use-dma-rx;
178 atmel,use-dma-tx;
179 status = "disabled";
180 };
181 };
182
183 nand0: nand@40000000 {
184 compatible = "atmel,at91rm9200-nand";
185 #address-cells = <1>;
186 #size-cells = <1>;
187 reg = < 0x40000000 0x10000000
188 0xffffe000 0x00000600
189 0xffffe600 0x00000200
190 0x00100000 0x00100000
191 >;
192 atmel,nand-addr-offset = <21>;
193 atmel,nand-cmd-offset = <22>;
194 gpios = <&pioD 5 0
195 &pioD 4 0
196 0
197 >;
198 status = "disabled";
199 };
200
201 usb0: ohci@00500000 {
202 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
203 reg = <0x00500000 0x00100000>;
204 interrupts = <22 4>;
205 status = "disabled";
206 };
207 };
208
209 i2c@0 {
210 compatible = "i2c-gpio";
211 gpios = <&pioA 30 0 /* sda */
212 &pioA 31 0 /* scl */
213 >;
214 i2c-gpio,sda-open-drain;
215 i2c-gpio,scl-open-drain;
216 i2c-gpio,delay-us = <2>; /* ~100 kHz */
217 #address-cells = <1>;
218 #size-cells = <0>;
219 status = "disabled";
220 };
221};