diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-11-18 17:40:01 -0500 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-11-18 17:54:31 -0500 |
commit | 9e3129e937e2f178d2a003ea45765e5e63e34665 (patch) | |
tree | fab157ec8ba266d60c51823a78848528753bac6b /arch/arm/boot/dts/at91sam9n12.dtsi | |
parent | d9b4fe837d671af5329f32570362c3c0b571c40b (diff) |
ARM: at91: fix usart/uart namimg in pinctrl
USART are the full pin uart
DBGU the debug Unit
UART the two pin uart
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9n12.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9n12.dtsi | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 7b644c5b0bed..10547bc52a2d 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi | |||
@@ -125,66 +125,66 @@ | |||
125 | }; | 125 | }; |
126 | }; | 126 | }; |
127 | 127 | ||
128 | uart0 { | 128 | usart0 { |
129 | pinctrl_uart0: uart0-0 { | 129 | pinctrl_usart0: usart0-0 { |
130 | atmel,pins = | 130 | atmel,pins = |
131 | <0 1 0x1 0x1 /* PA1 periph A with pullup */ | 131 | <0 1 0x1 0x1 /* PA1 periph A with pullup */ |
132 | 0 0 0x1 0x0>; /* PA0 periph A */ | 132 | 0 0 0x1 0x0>; /* PA0 periph A */ |
133 | }; | 133 | }; |
134 | 134 | ||
135 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { | 135 | pinctrl_usart0_rts_cts: usart0_rts_cts-0 { |
136 | atmel,pins = | 136 | atmel,pins = |
137 | <0 2 0x1 0x0 /* PA2 periph A */ | 137 | <0 2 0x1 0x0 /* PA2 periph A */ |
138 | 0 3 0x1 0x0>; /* PA3 periph A */ | 138 | 0 3 0x1 0x0>; /* PA3 periph A */ |
139 | }; | 139 | }; |
140 | }; | 140 | }; |
141 | 141 | ||
142 | uart1 { | 142 | usart1 { |
143 | pinctrl_uart1: uart1-0 { | 143 | pinctrl_usart1: usart1-0 { |
144 | atmel,pins = | 144 | atmel,pins = |
145 | <0 6 0x1 0x1 /* PA6 periph A with pullup */ | 145 | <0 6 0x1 0x1 /* PA6 periph A with pullup */ |
146 | 0 5 0x1 0x0>; /* PA5 periph A */ | 146 | 0 5 0x1 0x0>; /* PA5 periph A */ |
147 | }; | 147 | }; |
148 | }; | 148 | }; |
149 | 149 | ||
150 | uart2 { | 150 | usart2 { |
151 | pinctrl_uart2: uart2-0 { | 151 | pinctrl_usart2: usart2-0 { |
152 | atmel,pins = | 152 | atmel,pins = |
153 | <0 8 0x1 0x1 /* PA8 periph A with pullup */ | 153 | <0 8 0x1 0x1 /* PA8 periph A with pullup */ |
154 | 0 7 0x1 0x0>; /* PA7 periph A */ | 154 | 0 7 0x1 0x0>; /* PA7 periph A */ |
155 | }; | 155 | }; |
156 | 156 | ||
157 | pinctrl_uart2_rts_cts: uart2_rts_cts-0 { | 157 | pinctrl_usart2_rts_cts: usart2_rts_cts-0 { |
158 | atmel,pins = | 158 | atmel,pins = |
159 | <1 0 0x2 0x0 /* PB0 periph B */ | 159 | <1 0 0x2 0x0 /* PB0 periph B */ |
160 | 1 1 0x2 0x0>; /* PB1 periph B */ | 160 | 1 1 0x2 0x0>; /* PB1 periph B */ |
161 | }; | 161 | }; |
162 | }; | 162 | }; |
163 | 163 | ||
164 | uart3 { | 164 | usart3 { |
165 | pinctrl_uart3: uart3-0 { | 165 | pinctrl_usart3: usart3-0 { |
166 | atmel,pins = | 166 | atmel,pins = |
167 | <2 23 0x2 0x1 /* PC23 periph B with pullup */ | 167 | <2 23 0x2 0x1 /* PC23 periph B with pullup */ |
168 | 2 22 0x2 0x0>; /* PC22 periph B */ | 168 | 2 22 0x2 0x0>; /* PC22 periph B */ |
169 | }; | 169 | }; |
170 | 170 | ||
171 | pinctrl_uart3_rts_cts: uart3_rts_cts-0 { | 171 | pinctrl_usart3_rts_cts: usart3_rts_cts-0 { |
172 | atmel,pins = | 172 | atmel,pins = |
173 | <2 24 0x2 0x0 /* PC24 periph B */ | 173 | <2 24 0x2 0x0 /* PC24 periph B */ |
174 | 2 25 0x2 0x0>; /* PC25 periph B */ | 174 | 2 25 0x2 0x0>; /* PC25 periph B */ |
175 | }; | 175 | }; |
176 | }; | 176 | }; |
177 | 177 | ||
178 | usart0 { | 178 | uart0 { |
179 | pinctrl_usart0: usart0-0 { | 179 | pinctrl_uart0: uart0-0 { |
180 | atmel,pins = | 180 | atmel,pins = |
181 | <2 9 0x3 0x1 /* PC9 periph C with pullup */ | 181 | <2 9 0x3 0x1 /* PC9 periph C with pullup */ |
182 | 2 8 0x3 0x0>; /* PC8 periph C */ | 182 | 2 8 0x3 0x0>; /* PC8 periph C */ |
183 | }; | 183 | }; |
184 | }; | 184 | }; |
185 | 185 | ||
186 | usart1 { | 186 | uart1 { |
187 | pinctrl_usart1: usart1-0 { | 187 | pinctrl_uart1: uart1-0 { |
188 | atmel,pins = | 188 | atmel,pins = |
189 | <2 16 0x3 0x1 /* PC17 periph C with pullup */ | 189 | <2 16 0x3 0x1 /* PC17 periph C with pullup */ |
190 | 2 17 0x3 0x0>; /* PC16 periph C */ | 190 | 2 17 0x3 0x0>; /* PC16 periph C */ |
@@ -256,7 +256,7 @@ | |||
256 | atmel,use-dma-rx; | 256 | atmel,use-dma-rx; |
257 | atmel,use-dma-tx; | 257 | atmel,use-dma-tx; |
258 | pinctrl-names = "default"; | 258 | pinctrl-names = "default"; |
259 | pinctrl-0 = <&pinctrl_uart0>; | 259 | pinctrl-0 = <&pinctrl_usart0>; |
260 | status = "disabled"; | 260 | status = "disabled"; |
261 | }; | 261 | }; |
262 | 262 | ||
@@ -267,7 +267,7 @@ | |||
267 | atmel,use-dma-rx; | 267 | atmel,use-dma-rx; |
268 | atmel,use-dma-tx; | 268 | atmel,use-dma-tx; |
269 | pinctrl-names = "default"; | 269 | pinctrl-names = "default"; |
270 | pinctrl-0 = <&pinctrl_uart1>; | 270 | pinctrl-0 = <&pinctrl_usart1>; |
271 | status = "disabled"; | 271 | status = "disabled"; |
272 | }; | 272 | }; |
273 | 273 | ||
@@ -278,7 +278,7 @@ | |||
278 | atmel,use-dma-rx; | 278 | atmel,use-dma-rx; |
279 | atmel,use-dma-tx; | 279 | atmel,use-dma-tx; |
280 | pinctrl-names = "default"; | 280 | pinctrl-names = "default"; |
281 | pinctrl-0 = <&pinctrl_uart2>; | 281 | pinctrl-0 = <&pinctrl_usart2>; |
282 | status = "disabled"; | 282 | status = "disabled"; |
283 | }; | 283 | }; |
284 | 284 | ||
@@ -289,7 +289,7 @@ | |||
289 | atmel,use-dma-rx; | 289 | atmel,use-dma-rx; |
290 | atmel,use-dma-tx; | 290 | atmel,use-dma-tx; |
291 | pinctrl-names = "default"; | 291 | pinctrl-names = "default"; |
292 | pinctrl-0 = <&pinctrl_uart3>; | 292 | pinctrl-0 = <&pinctrl_usart3>; |
293 | status = "disabled"; | 293 | status = "disabled"; |
294 | }; | 294 | }; |
295 | 295 | ||