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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-05-12 12:26:28 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-05-22 12:03:16 -0400
commit68f1938edd034fb08c153d6c5979f30b7ed54b13 (patch)
tree6a3bef82e7501a11b6e179f3500c79dc25b2c364 /arch/arm/boot/dts/at91sam9n12.dtsi
parent233df5d124b00808374cca91cd7936e62086c20b (diff)
ARM: at91/dt: define sam9n12 clocks
Define sam9n12 clocks and make use of them in peripheral definitions. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9n12.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi348
1 files changed, 346 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 9f04808fc697..d1b82e6635d5 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -12,6 +12,7 @@
12#include <dt-bindings/pinctrl/at91.h> 12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
15 16
16/ { 17/ {
17 model = "Atmel AT91SAM9N12 SoC"; 18 model = "Atmel AT91SAM9N12 SoC";
@@ -49,6 +50,18 @@
49 reg = <0x20000000 0x10000000>; 50 reg = <0x20000000 0x10000000>;
50 }; 51 };
51 52
53 slow_xtal: slow_xtal {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58
59 main_xtal: main_xtal {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
63 };
64
52 ahb { 65 ahb {
53 compatible = "simple-bus"; 66 compatible = "simple-bus";
54 #address-cells = <1>; 67 #address-cells = <1>;
@@ -75,8 +88,280 @@
75 }; 88 };
76 89
77 pmc: pmc@fffffc00 { 90 pmc: pmc@fffffc00 {
78 compatible = "atmel,at91rm9200-pmc"; 91 compatible = "atmel,at91sam9n12-pmc";
79 reg = <0xfffffc00 0x100>; 92 reg = <0xfffffc00 0x200>;
93 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
94 interrupt-controller;
95 #address-cells = <1>;
96 #size-cells = <0>;
97 #interrupt-cells = <1>;
98
99 main_rc_osc: main_rc_osc {
100 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
101 #clock-cells = <0>;
102 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
103 clock-frequency = <12000000>;
104 clock-accuracy = <50000000>;
105 };
106
107 main_osc: main_osc {
108 compatible = "atmel,at91rm9200-clk-main-osc";
109 #clock-cells = <0>;
110 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
111 clocks = <&main_xtal>;
112 };
113
114 main: mainck {
115 compatible = "atmel,at91sam9x5-clk-main";
116 #clock-cells = <0>;
117 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
118 clocks = <&main_rc_osc>, <&main_osc>;
119 };
120
121 plla: pllack {
122 compatible = "atmel,at91rm9200-clk-pll";
123 #clock-cells = <0>;
124 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
125 clocks = <&main>;
126 reg = <0>;
127 atmel,clk-input-range = <2000000 32000000>;
128 #atmel,pll-clk-output-range-cells = <4>;
129 atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
130 <695000000 750000000 1 0>,
131 <645000000 700000000 2 0>,
132 <595000000 650000000 3 0>,
133 <545000000 600000000 0 1>,
134 <495000000 555000000 1 1>,
135 <445000000 500000000 1 2>,
136 <400000000 450000000 1 3>;
137 };
138
139 plladiv: plladivck {
140 compatible = "atmel,at91sam9x5-clk-plldiv";
141 #clock-cells = <0>;
142 clocks = <&plla>;
143 };
144
145 pllb: pllbck {
146 compatible = "atmel,at91rm9200-clk-pll";
147 #clock-cells = <0>;
148 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
149 clocks = <&main>;
150 reg = <1>;
151 atmel,clk-input-range = <2000000 32000000>;
152 #atmel,pll-clk-output-range-cells = <3>;
153 atmel,pll-clk-output-ranges = <30000000 100000000 0>;
154 };
155
156 mck: masterck {
157 compatible = "atmel,at91sam9x5-clk-master";
158 #clock-cells = <0>;
159 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
160 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
161 atmel,clk-output-range = <0 133333333>;
162 atmel,clk-divisors = <1 2 4 3>;
163 atmel,master-clk-have-div3-pres;
164 };
165
166 usb: usbck {
167 compatible = "atmel,at91sam9n12-clk-usb";
168 #clock-cells = <0>;
169 clocks = <&pllb>;
170 };
171
172 prog: progck {
173 compatible = "atmel,at91sam9x5-clk-programmable";
174 #address-cells = <1>;
175 #size-cells = <0>;
176 interrupt-parent = <&pmc>;
177 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
178
179 prog0: prog0 {
180 #clock-cells = <0>;
181 reg = <0>;
182 interrupts = <AT91_PMC_PCKRDY(0)>;
183 };
184
185 prog1: prog1 {
186 #clock-cells = <0>;
187 reg = <1>;
188 interrupts = <AT91_PMC_PCKRDY(1)>;
189 };
190 };
191
192 systemck {
193 compatible = "atmel,at91rm9200-clk-system";
194 #address-cells = <1>;
195 #size-cells = <0>;
196
197 ddrck: ddrck {
198 #clock-cells = <0>;
199 reg = <2>;
200 clocks = <&mck>;
201 };
202
203 lcdck: lcdck {
204 #clock-cells = <0>;
205 reg = <3>;
206 clocks = <&mck>;
207 };
208
209 uhpck: uhpck {
210 #clock-cells = <0>;
211 reg = <6>;
212 clocks = <&usb>;
213 };
214
215 udpck: udpck {
216 #clock-cells = <0>;
217 reg = <7>;
218 clocks = <&usb>;
219 };
220
221 pck0: pck0 {
222 #clock-cells = <0>;
223 reg = <8>;
224 clocks = <&prog0>;
225 };
226
227 pck1: pck1 {
228 #clock-cells = <0>;
229 reg = <9>;
230 clocks = <&prog1>;
231 };
232 };
233
234 periphck {
235 compatible = "atmel,at91sam9x5-clk-peripheral";
236 #address-cells = <1>;
237 #size-cells = <0>;
238 clocks = <&mck>;
239
240 pioAB_clk: pioAB_clk {
241 #clock-cells = <0>;
242 reg = <2>;
243 };
244
245 pioCD_clk: pioCD_clk {
246 #clock-cells = <0>;
247 reg = <3>;
248 };
249
250 fuse_clk: fuse_clk {
251 #clock-cells = <0>;
252 reg = <4>;
253 };
254
255 usart0_clk: usart0_clk {
256 #clock-cells = <0>;
257 reg = <5>;
258 };
259
260 usart1_clk: usart1_clk {
261 #clock-cells = <0>;
262 reg = <6>;
263 };
264
265 usart2_clk: usart2_clk {
266 #clock-cells = <0>;
267 reg = <7>;
268 };
269
270 usart3_clk: usart3_clk {
271 #clock-cells = <0>;
272 reg = <8>;
273 };
274
275 twi0_clk: twi0_clk {
276 reg = <9>;
277 #clock-cells = <0>;
278 };
279
280 twi1_clk: twi1_clk {
281 #clock-cells = <0>;
282 reg = <10>;
283 };
284
285 mci0_clk: mci0_clk {
286 #clock-cells = <0>;
287 reg = <12>;
288 };
289
290 spi0_clk: spi0_clk {
291 #clock-cells = <0>;
292 reg = <13>;
293 };
294
295 spi1_clk: spi1_clk {
296 #clock-cells = <0>;
297 reg = <14>;
298 };
299
300 uart0_clk: uart0_clk {
301 #clock-cells = <0>;
302 reg = <15>;
303 };
304
305 uart1_clk: uart1_clk {
306 #clock-cells = <0>;
307 reg = <16>;
308 };
309
310 tcb_clk: tcb_clk {
311 #clock-cells = <0>;
312 reg = <17>;
313 };
314
315 pwm_clk: pwm_clk {
316 #clock-cells = <0>;
317 reg = <18>;
318 };
319
320 adc_clk: adc_clk {
321 #clock-cells = <0>;
322 reg = <19>;
323 };
324
325 dma0_clk: dma0_clk {
326 #clock-cells = <0>;
327 reg = <20>;
328 };
329
330 uhphs_clk: uhphs_clk {
331 #clock-cells = <0>;
332 reg = <22>;
333 };
334
335 udphs_clk: udphs_clk {
336 #clock-cells = <0>;
337 reg = <23>;
338 };
339
340 lcdc_clk: lcdc_clk {
341 #clock-cells = <0>;
342 reg = <25>;
343 };
344
345 sha_clk: sha_clk {
346 #clock-cells = <0>;
347 reg = <27>;
348 };
349
350 ssc0_clk: ssc0_clk {
351 #clock-cells = <0>;
352 reg = <28>;
353 };
354
355 aes_clk: aes_clk {
356 #clock-cells = <0>;
357 reg = <29>;
358 };
359
360 trng_clk: trng_clk {
361 #clock-cells = <0>;
362 reg = <30>;
363 };
364 };
80 }; 365 };
81 366
82 rstc@fffffe00 { 367 rstc@fffffe00 {
@@ -88,6 +373,7 @@
88 compatible = "atmel,at91sam9260-pit"; 373 compatible = "atmel,at91sam9260-pit";
89 reg = <0xfffffe30 0xf>; 374 reg = <0xfffffe30 0xf>;
90 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 375 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
376 clocks = <&mck>;
91 }; 377 };
92 378
93 shdwc@fffffe10 { 379 shdwc@fffffe10 {
@@ -95,12 +381,38 @@
95 reg = <0xfffffe10 0x10>; 381 reg = <0xfffffe10 0x10>;
96 }; 382 };
97 383
384 sckc@fffffe50 {
385 compatible = "atmel,at91sam9x5-sckc";
386 reg = <0xfffffe50 0x4>;
387
388 slow_osc: slow_osc {
389 compatible = "atmel,at91sam9x5-clk-slow-osc";
390 #clock-cells = <0>;
391 clocks = <&slow_xtal>;
392 };
393
394 slow_rc_osc: slow_rc_osc {
395 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
396 #clock-cells = <0>;
397 clock-frequency = <32768>;
398 clock-accuracy = <50000000>;
399 };
400
401 clk32k: slck {
402 compatible = "atmel,at91sam9x5-clk-slow";
403 #clock-cells = <0>;
404 clocks = <&slow_rc_osc>, <&slow_osc>;
405 };
406 };
407
98 mmc0: mmc@f0008000 { 408 mmc0: mmc@f0008000 {
99 compatible = "atmel,hsmci"; 409 compatible = "atmel,hsmci";
100 reg = <0xf0008000 0x600>; 410 reg = <0xf0008000 0x600>;
101 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; 411 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
102 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 412 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
103 dma-names = "rxtx"; 413 dma-names = "rxtx";
414 clocks = <&mci0_clk>;
415 clock-names = "mci_clk";
104 #address-cells = <1>; 416 #address-cells = <1>;
105 #size-cells = <0>; 417 #size-cells = <0>;
106 status = "disabled"; 418 status = "disabled";
@@ -110,12 +422,16 @@
110 compatible = "atmel,at91sam9x5-tcb"; 422 compatible = "atmel,at91sam9x5-tcb";
111 reg = <0xf8008000 0x100>; 423 reg = <0xf8008000 0x100>;
112 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 424 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
425 clocks = <&tcb_clk>;
426 clock-names = "t0_clk";
113 }; 427 };
114 428
115 tcb1: timer@f800c000 { 429 tcb1: timer@f800c000 {
116 compatible = "atmel,at91sam9x5-tcb"; 430 compatible = "atmel,at91sam9x5-tcb";
117 reg = <0xf800c000 0x100>; 431 reg = <0xf800c000 0x100>;
118 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 432 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
433 clocks = <&tcb_clk>;
434 clock-names = "t0_clk";
119 }; 435 };
120 436
121 dma: dma-controller@ffffec00 { 437 dma: dma-controller@ffffec00 {
@@ -123,6 +439,8 @@
123 reg = <0xffffec00 0x200>; 439 reg = <0xffffec00 0x200>;
124 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 440 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
125 #dma-cells = <2>; 441 #dma-cells = <2>;
442 clocks = <&dma0_clk>;
443 clock-names = "dma_clk";
126 }; 444 };
127 445
128 pinctrl@fffff400 { 446 pinctrl@fffff400 {
@@ -392,6 +710,7 @@
392 gpio-controller; 710 gpio-controller;
393 interrupt-controller; 711 interrupt-controller;
394 #interrupt-cells = <2>; 712 #interrupt-cells = <2>;
713 clocks = <&pioAB_clk>;
395 }; 714 };
396 715
397 pioB: gpio@fffff600 { 716 pioB: gpio@fffff600 {
@@ -402,6 +721,7 @@
402 gpio-controller; 721 gpio-controller;
403 interrupt-controller; 722 interrupt-controller;
404 #interrupt-cells = <2>; 723 #interrupt-cells = <2>;
724 clocks = <&pioAB_clk>;
405 }; 725 };
406 726
407 pioC: gpio@fffff800 { 727 pioC: gpio@fffff800 {
@@ -412,6 +732,7 @@
412 gpio-controller; 732 gpio-controller;
413 interrupt-controller; 733 interrupt-controller;
414 #interrupt-cells = <2>; 734 #interrupt-cells = <2>;
735 clocks = <&pioCD_clk>;
415 }; 736 };
416 737
417 pioD: gpio@fffffa00 { 738 pioD: gpio@fffffa00 {
@@ -422,6 +743,7 @@
422 gpio-controller; 743 gpio-controller;
423 interrupt-controller; 744 interrupt-controller;
424 #interrupt-cells = <2>; 745 #interrupt-cells = <2>;
746 clocks = <&pioCD_clk>;
425 }; 747 };
426 }; 748 };
427 749
@@ -431,6 +753,8 @@
431 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 753 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
432 pinctrl-names = "default"; 754 pinctrl-names = "default";
433 pinctrl-0 = <&pinctrl_dbgu>; 755 pinctrl-0 = <&pinctrl_dbgu>;
756 clocks = <&mck>;
757 clock-names = "usart";
434 status = "disabled"; 758 status = "disabled";
435 }; 759 };
436 760
@@ -443,6 +767,8 @@
443 dma-names = "tx", "rx"; 767 dma-names = "tx", "rx";
444 pinctrl-names = "default"; 768 pinctrl-names = "default";
445 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 769 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
770 clocks = <&ssc0_clk>;
771 clock-names = "pclk";
446 status = "disabled"; 772 status = "disabled";
447 }; 773 };
448 774
@@ -452,6 +778,8 @@
452 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; 778 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
453 pinctrl-names = "default"; 779 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_usart0>; 780 pinctrl-0 = <&pinctrl_usart0>;
781 clocks = <&usart0_clk>;
782 clock-names = "usart";
455 status = "disabled"; 783 status = "disabled";
456 }; 784 };
457 785
@@ -461,6 +789,8 @@
461 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 789 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
462 pinctrl-names = "default"; 790 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_usart1>; 791 pinctrl-0 = <&pinctrl_usart1>;
792 clocks = <&usart1_clk>;
793 clock-names = "usart";
464 status = "disabled"; 794 status = "disabled";
465 }; 795 };
466 796
@@ -470,6 +800,8 @@
470 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 800 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
471 pinctrl-names = "default"; 801 pinctrl-names = "default";
472 pinctrl-0 = <&pinctrl_usart2>; 802 pinctrl-0 = <&pinctrl_usart2>;
803 clocks = <&usart2_clk>;
804 clock-names = "usart";
473 status = "disabled"; 805 status = "disabled";
474 }; 806 };
475 807
@@ -479,6 +811,8 @@
479 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 811 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
480 pinctrl-names = "default"; 812 pinctrl-names = "default";
481 pinctrl-0 = <&pinctrl_usart3>; 813 pinctrl-0 = <&pinctrl_usart3>;
814 clocks = <&usart3_clk>;
815 clock-names = "usart";
482 status = "disabled"; 816 status = "disabled";
483 }; 817 };
484 818
@@ -493,6 +827,7 @@
493 #size-cells = <0>; 827 #size-cells = <0>;
494 pinctrl-names = "default"; 828 pinctrl-names = "default";
495 pinctrl-0 = <&pinctrl_i2c0>; 829 pinctrl-0 = <&pinctrl_i2c0>;
830 clocks = <&twi0_clk>;
496 status = "disabled"; 831 status = "disabled";
497 }; 832 };
498 833
@@ -507,6 +842,7 @@
507 #size-cells = <0>; 842 #size-cells = <0>;
508 pinctrl-names = "default"; 843 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_i2c1>; 844 pinctrl-0 = <&pinctrl_i2c1>;
845 clocks = <&twi1_clk>;
510 status = "disabled"; 846 status = "disabled";
511 }; 847 };
512 848
@@ -521,6 +857,8 @@
521 dma-names = "tx", "rx"; 857 dma-names = "tx", "rx";
522 pinctrl-names = "default"; 858 pinctrl-names = "default";
523 pinctrl-0 = <&pinctrl_spi0>; 859 pinctrl-0 = <&pinctrl_spi0>;
860 clocks = <&spi0_clk>;
861 clock-names = "spi_clk";
524 status = "disabled"; 862 status = "disabled";
525 }; 863 };
526 864
@@ -535,6 +873,8 @@
535 dma-names = "tx", "rx"; 873 dma-names = "tx", "rx";
536 pinctrl-names = "default"; 874 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_spi1>; 875 pinctrl-0 = <&pinctrl_spi1>;
876 clocks = <&spi1_clk>;
877 clock-names = "spi_clk";
538 status = "disabled"; 878 status = "disabled";
539 }; 879 };
540 880
@@ -554,6 +894,7 @@
554 reg = <0xf8034000 0x300>; 894 reg = <0xf8034000 0x300>;
555 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; 895 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
556 #pwm-cells = <3>; 896 #pwm-cells = <3>;
897 clocks = <&pwm_clk>;
557 status = "disabled"; 898 status = "disabled";
558 }; 899 };
559 }; 900 };
@@ -584,6 +925,9 @@
584 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 925 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
585 reg = <0x00500000 0x00100000>; 926 reg = <0x00500000 0x00100000>;
586 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 927 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
928 clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
929 <&uhpck>;
930 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
587 status = "disabled"; 931 status = "disabled";
588 }; 932 };
589 }; 933 };