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authorBoris BREZILLON <b.brezillon@overkiz.com>2013-05-24 06:05:56 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-05-31 16:40:37 -0400
commit028633c238f91dc113520a7ad25d37b2ba9068af (patch)
tree941a30e0ecf500b46d8d66b88299a58b430a6460 /arch/arm/boot/dts/at91sam9n12.dtsi
parentc77bcef4c99c6638c85d31391391bf80f98c5572 (diff)
ARM: at91/dt: add pinctrl definition for at91 tc blocks
This patch adds pinctrl configurations for at91 Timer Counter blocks. These pin definitions can be referenced by "atmel,tcb-pwm" devices to setup pins as PWM output for instance. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> [nicolas.ferre@atmel.com: switch to pinctrl pre-processor macros] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9n12.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi76
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index d12da339d0e2..3166e1d06c18 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -285,6 +285,82 @@
285 }; 285 };
286 }; 286 };
287 287
288 tcb0 {
289 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
290 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
291 };
292
293 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
294 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
295 };
296
297 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
298 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
299 };
300
301 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
302 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
303 };
304
305 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
306 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
307 };
308
309 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
310 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
311 };
312
313 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
314 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
315 };
316
317 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
318 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
319 };
320
321 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
322 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
323 };
324 };
325
326 tcb1 {
327 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
328 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
329 };
330
331 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
332 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
333 };
334
335 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
336 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
337 };
338
339 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
340 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
341 };
342
343 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
344 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
345 };
346
347 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
348 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
349 };
350
351 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
352 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
353 };
354
355 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
356 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
357 };
358
359 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
360 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
361 };
362 };
363
288 pioA: gpio@fffff400 { 364 pioA: gpio@fffff400 {
289 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 365 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
290 reg = <0xfffff400 0x200>; 366 reg = <0xfffff400 0x200>;