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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-07-04 05:20:46 -0400
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-10-12 21:09:28 -0400
commite4541ff21284e5f2208473b39b535fcd50318c92 (patch)
tree60fda37347ded71c8e1c2c40f058fbb20ce739a6 /arch/arm/boot/dts/at91sam9g45.dtsi
parentc18486e10d5801b832b34708f6d2bd266c704793 (diff)
at91: regroup gpio and pinctrl under the same ranges
Fix also the reg size as we have 512 bytes bank not 256 bytes per gpio/mux controller Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9g45.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi95
1 files changed, 51 insertions, 44 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 3add030d61f8..f2b0f93c0499 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -108,54 +108,61 @@
108 interrupts = <21 4 0>; 108 interrupts = <21 4 0>;
109 }; 109 };
110 110
111 pioA: gpio@fffff200 { 111 pinctrl@fffff200 {
112 compatible = "atmel,at91rm9200-gpio"; 112 #address-cells = <1>;
113 reg = <0xfffff200 0x100>; 113 #size-cells = <1>;
114 interrupts = <2 4 1>; 114 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
115 #gpio-cells = <2>; 115 ranges = <0xfffff200 0xfffff200 0xa00>;
116 gpio-controller; 116
117 interrupt-controller; 117 pioA: gpio@fffff200 {
118 #interrupt-cells = <2>; 118 compatible = "atmel,at91rm9200-gpio";
119 }; 119 reg = <0xfffff200 0x200>;
120 interrupts = <2 4 1>;
121 #gpio-cells = <2>;
122 gpio-controller;
123 interrupt-controller;
124 #interrupt-cells = <2>;
125 };
120 126
121 pioB: gpio@fffff400 { 127 pioB: gpio@fffff400 {
122 compatible = "atmel,at91rm9200-gpio"; 128 compatible = "atmel,at91rm9200-gpio";
123 reg = <0xfffff400 0x100>; 129 reg = <0xfffff400 0x200>;
124 interrupts = <3 4 1>; 130 interrupts = <3 4 1>;
125 #gpio-cells = <2>; 131 #gpio-cells = <2>;
126 gpio-controller; 132 gpio-controller;
127 interrupt-controller; 133 interrupt-controller;
128 #interrupt-cells = <2>; 134 #interrupt-cells = <2>;
129 }; 135 };
130 136
131 pioC: gpio@fffff600 { 137 pioC: gpio@fffff600 {
132 compatible = "atmel,at91rm9200-gpio"; 138 compatible = "atmel,at91rm9200-gpio";
133 reg = <0xfffff600 0x100>; 139 reg = <0xfffff600 0x200>;
134 interrupts = <4 4 1>; 140 interrupts = <4 4 1>;
135 #gpio-cells = <2>; 141 #gpio-cells = <2>;
136 gpio-controller; 142 gpio-controller;
137 interrupt-controller; 143 interrupt-controller;
138 #interrupt-cells = <2>; 144 #interrupt-cells = <2>;
139 }; 145 };
140 146
141 pioD: gpio@fffff800 { 147 pioD: gpio@fffff800 {
142 compatible = "atmel,at91rm9200-gpio"; 148 compatible = "atmel,at91rm9200-gpio";
143 reg = <0xfffff800 0x100>; 149 reg = <0xfffff800 0x200>;
144 interrupts = <5 4 1>; 150 interrupts = <5 4 1>;
145 #gpio-cells = <2>; 151 #gpio-cells = <2>;
146 gpio-controller; 152 gpio-controller;
147 interrupt-controller; 153 interrupt-controller;
148 #interrupt-cells = <2>; 154 #interrupt-cells = <2>;
149 }; 155 };
150 156
151 pioE: gpio@fffffa00 { 157 pioE: gpio@fffffa00 {
152 compatible = "atmel,at91rm9200-gpio"; 158 compatible = "atmel,at91rm9200-gpio";
153 reg = <0xfffffa00 0x100>; 159 reg = <0xfffffa00 0x200>;
154 interrupts = <5 4 1>; 160 interrupts = <5 4 1>;
155 #gpio-cells = <2>; 161 #gpio-cells = <2>;
156 gpio-controller; 162 gpio-controller;
157 interrupt-controller; 163 interrupt-controller;
158 #interrupt-cells = <2>; 164 #interrupt-cells = <2>;
165 };
159 }; 166 };
160 167
161 dbgu: serial@ffffee00 { 168 dbgu: serial@ffffee00 {