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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2013-04-23 20:34:25 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-05-17 06:11:39 -0400
commitc9d0f317c6dc45f84888bc11947bc10e6c547dc3 (patch)
treeef4d865a48a66b378917b101c85eb011f5ca624b /arch/arm/boot/dts/at91sam9263.dtsi
parent0e4686e6e662205b87e64af7c0ba9ef81e2c8791 (diff)
ARM: at91: dt: switch to pinctrl to pre-processor
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9263.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi149
1 files changed, 75 insertions, 74 deletions
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 5edfadf20482..bb4d7ca24b93 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include "skeleton.dtsi" 9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
11 12
12/ { 13/ {
@@ -111,214 +112,214 @@
111 dbgu { 112 dbgu {
112 pinctrl_dbgu: dbgu-0 { 113 pinctrl_dbgu: dbgu-0 {
113 atmel,pins = 114 atmel,pins =
114 <2 30 0x1 0x0 /* PC30 periph A */ 115 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
115 2 31 0x1 0x1>; /* PC31 periph with pullup */ 116 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
116 }; 117 };
117 }; 118 };
118 119
119 usart0 { 120 usart0 {
120 pinctrl_usart0: usart0-0 { 121 pinctrl_usart0: usart0-0 {
121 atmel,pins = 122 atmel,pins =
122 <0 26 0x1 0x1 /* PA26 periph A with pullup */ 123 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
123 0 27 0x1 0x0>; /* PA27 periph A */ 124 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
124 }; 125 };
125 126
126 pinctrl_usart0_rts: usart0_rts-0 { 127 pinctrl_usart0_rts: usart0_rts-0 {
127 atmel,pins = 128 atmel,pins =
128 <0 28 0x1 0x0>; /* PA28 periph A */ 129 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
129 }; 130 };
130 131
131 pinctrl_usart0_cts: usart0_cts-0 { 132 pinctrl_usart0_cts: usart0_cts-0 {
132 atmel,pins = 133 atmel,pins =
133 <0 29 0x1 0x0>; /* PA29 periph A */ 134 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
134 }; 135 };
135 }; 136 };
136 137
137 usart1 { 138 usart1 {
138 pinctrl_usart1: usart1-0 { 139 pinctrl_usart1: usart1-0 {
139 atmel,pins = 140 atmel,pins =
140 <3 0 0x1 0x1 /* PD0 periph A with pullup */ 141 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
141 3 1 0x1 0x0>; /* PD1 periph A */ 142 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
142 }; 143 };
143 144
144 pinctrl_usart1_rts: usart1_rts-0 { 145 pinctrl_usart1_rts: usart1_rts-0 {
145 atmel,pins = 146 atmel,pins =
146 <3 7 0x2 0x0>; /* PD7 periph B */ 147 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
147 }; 148 };
148 149
149 pinctrl_usart1_cts: usart1_cts-0 { 150 pinctrl_usart1_cts: usart1_cts-0 {
150 atmel,pins = 151 atmel,pins =
151 <3 8 0x2 0x0>; /* PD8 periph B */ 152 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
152 }; 153 };
153 }; 154 };
154 155
155 usart2 { 156 usart2 {
156 pinctrl_usart2: usart2-0 { 157 pinctrl_usart2: usart2-0 {
157 atmel,pins = 158 atmel,pins =
158 <3 2 0x1 0x1 /* PD2 periph A with pullup */ 159 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
159 3 3 0x1 0x0>; /* PD3 periph A */ 160 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
160 }; 161 };
161 162
162 pinctrl_usart2_rts: usart2_rts-0 { 163 pinctrl_usart2_rts: usart2_rts-0 {
163 atmel,pins = 164 atmel,pins =
164 <3 5 0x2 0x0>; /* PD5 periph B */ 165 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
165 }; 166 };
166 167
167 pinctrl_usart2_cts: usart2_cts-0 { 168 pinctrl_usart2_cts: usart2_cts-0 {
168 atmel,pins = 169 atmel,pins =
169 <4 6 0x2 0x0>; /* PD6 periph B */ 170 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
170 }; 171 };
171 }; 172 };
172 173
173 nand { 174 nand {
174 pinctrl_nand: nand-0 { 175 pinctrl_nand: nand-0 {
175 atmel,pins = 176 atmel,pins =
176 <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/ 177 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
177 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */ 178 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
178 }; 179 };
179 }; 180 };
180 181
181 macb { 182 macb {
182 pinctrl_macb_rmii: macb_rmii-0 { 183 pinctrl_macb_rmii: macb_rmii-0 {
183 atmel,pins = 184 atmel,pins =
184 <2 25 0x2 0x0 /* PC25 periph B */ 185 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
185 4 21 0x1 0x0 /* PE21 periph A */ 186 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
186 4 23 0x1 0x0 /* PE23 periph A */ 187 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
187 4 24 0x1 0x0 /* PE24 periph A */ 188 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
188 4 25 0x1 0x0 /* PE25 periph A */ 189 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
189 4 26 0x1 0x0 /* PE26 periph A */ 190 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
190 4 27 0x1 0x0 /* PE27 periph A */ 191 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
191 4 28 0x1 0x0 /* PE28 periph A */ 192 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
192 4 29 0x1 0x0 /* PE29 periph A */ 193 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
193 4 30 0x1 0x0>; /* PE30 periph A */ 194 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
194 }; 195 };
195 196
196 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 197 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
197 atmel,pins = 198 atmel,pins =
198 <2 20 0x2 0x0 /* PC20 periph B */ 199 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
199 2 21 0x2 0x0 /* PC21 periph B */ 200 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
200 2 22 0x2 0x0 /* PC22 periph B */ 201 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
201 2 23 0x2 0x0 /* PC23 periph B */ 202 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
202 2 24 0x2 0x0 /* PC24 periph B */ 203 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
203 2 25 0x2 0x0 /* PC25 periph B */ 204 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
204 2 27 0x2 0x0 /* PC27 periph B */ 205 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
205 4 22 0x2 0x0>; /* PE22 periph B */ 206 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
206 }; 207 };
207 }; 208 };
208 209
209 mmc0 { 210 mmc0 {
210 pinctrl_mmc0_clk: mmc0_clk-0 { 211 pinctrl_mmc0_clk: mmc0_clk-0 {
211 atmel,pins = 212 atmel,pins =
212 <0 12 0x1 0x0>; /* PA12 periph A */ 213 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
213 }; 214 };
214 215
215 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 216 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
216 atmel,pins = 217 atmel,pins =
217 <0 1 0x1 0x1 /* PA1 periph A with pullup */ 218 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
218 0 0 0x1 0x1>; /* PA0 periph A with pullup */ 219 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
219 }; 220 };
220 221
221 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 222 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
222 atmel,pins = 223 atmel,pins =
223 <0 3 0x1 0x1 /* PA3 periph A with pullup */ 224 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
224 0 4 0x1 0x1 /* PA4 periph A with pullup */ 225 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
225 0 5 0x1 0x1>; /* PA5 periph A with pullup */ 226 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
226 }; 227 };
227 228
228 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 229 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
229 atmel,pins = 230 atmel,pins =
230 <0 16 0x1 0x1 /* PA16 periph A with pullup */ 231 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
231 0 17 0x1 0x1>; /* PA17 periph A with pullup */ 232 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
232 }; 233 };
233 234
234 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 235 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
235 atmel,pins = 236 atmel,pins =
236 <0 18 0x1 0x1 /* PA18 periph A with pullup */ 237 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
237 0 19 0x1 0x1 /* PA19 periph A with pullup */ 238 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
238 0 20 0x1 0x1>; /* PA20 periph A with pullup */ 239 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
239 }; 240 };
240 }; 241 };
241 242
242 mmc1 { 243 mmc1 {
243 pinctrl_mmc1_clk: mmc1_clk-0 { 244 pinctrl_mmc1_clk: mmc1_clk-0 {
244 atmel,pins = 245 atmel,pins =
245 <0 6 0x1 0x0>; /* PA6 periph A */ 246 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
246 }; 247 };
247 248
248 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 249 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
249 atmel,pins = 250 atmel,pins =
250 <0 7 0x1 0x1 /* PA7 periph A with pullup */ 251 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
251 0 8 0x1 0x1>; /* PA8 periph A with pullup */ 252 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
252 }; 253 };
253 254
254 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 255 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
255 atmel,pins = 256 atmel,pins =
256 <0 9 0x1 0x1 /* PA9 periph A with pullup */ 257 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
257 0 10 0x1 0x1 /* PA10 periph A with pullup */ 258 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
258 0 11 0x1 0x1>; /* PA11 periph A with pullup */ 259 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
259 }; 260 };
260 261
261 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 262 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
262 atmel,pins = 263 atmel,pins =
263 <0 21 0x1 0x1 /* PA21 periph A with pullup */ 264 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
264 0 22 0x1 0x1>; /* PA22 periph A with pullup */ 265 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
265 }; 266 };
266 267
267 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 268 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
268 atmel,pins = 269 atmel,pins =
269 <0 23 0x1 0x1 /* PA23 periph A with pullup */ 270 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
270 0 24 0x1 0x1 /* PA24 periph A with pullup */ 271 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
271 0 25 0x1 0x1>; /* PA25 periph A with pullup */ 272 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
272 }; 273 };
273 }; 274 };
274 275
275 ssc0 { 276 ssc0 {
276 pinctrl_ssc0_tx: ssc0_tx-0 { 277 pinctrl_ssc0_tx: ssc0_tx-0 {
277 atmel,pins = 278 atmel,pins =
278 <1 0 0x2 0x0 /* PB0 periph B */ 279 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
279 1 1 0x2 0x0 /* PB1 periph B */ 280 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
280 1 2 0x2 0x0>; /* PB2 periph B */ 281 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
281 }; 282 };
282 283
283 pinctrl_ssc0_rx: ssc0_rx-0 { 284 pinctrl_ssc0_rx: ssc0_rx-0 {
284 atmel,pins = 285 atmel,pins =
285 <1 3 0x2 0x0 /* PB3 periph B */ 286 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
286 1 4 0x2 0x0 /* PB4 periph B */ 287 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
287 1 5 0x2 0x0>; /* PB5 periph B */ 288 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
288 }; 289 };
289 }; 290 };
290 291
291 ssc1 { 292 ssc1 {
292 pinctrl_ssc1_tx: ssc1_tx-0 { 293 pinctrl_ssc1_tx: ssc1_tx-0 {
293 atmel,pins = 294 atmel,pins =
294 <1 6 0x1 0x0 /* PB6 periph A */ 295 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
295 1 7 0x1 0x0 /* PB7 periph A */ 296 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
296 1 8 0x1 0x0>; /* PB8 periph A */ 297 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
297 }; 298 };
298 299
299 pinctrl_ssc1_rx: ssc1_rx-0 { 300 pinctrl_ssc1_rx: ssc1_rx-0 {
300 atmel,pins = 301 atmel,pins =
301 <1 9 0x1 0x0 /* PB9 periph A */ 302 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
302 1 10 0x1 0x0 /* PB10 periph A */ 303 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
303 1 11 0x1 0x0>; /* PB11 periph A */ 304 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
304 }; 305 };
305 }; 306 };
306 307
307 spi0 { 308 spi0 {
308 pinctrl_spi0: spi0-0 { 309 pinctrl_spi0: spi0-0 {
309 atmel,pins = 310 atmel,pins =
310 <0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */ 311 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
311 0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */ 312 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
312 0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */ 313 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
313 }; 314 };
314 }; 315 };
315 316
316 spi1 { 317 spi1 {
317 pinctrl_spi1: spi1-0 { 318 pinctrl_spi1: spi1-0 {
318 atmel,pins = 319 atmel,pins =
319 <1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */ 320 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
320 1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */ 321 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
321 1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */ 322 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
322 }; 323 };
323 }; 324 };
324 325
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 12:45:11 -0500