ARM: at91: dt: at91sam9260: split rts and cts pinctrl not

as we just use the rts and not the rts & cts for rs485

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

1 files changed, 21 insertions, 9 deletions

diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index cf4b59fc8e08..a14aa3d1f015 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -120,10 +120,14 @@
                                                          0 27 0x1 0x0>; /* PA27 periph A */
                                         };
 
-                                        pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
+                                        pinctrl_usart0_rts: usart0_rts-0 {
                                                 atmel,pins =
-                                                        <0 28 0x1 0x0   /* PA28 periph A */
-                                                         0 29 0x1 0x0>; /* PA29 periph A */
+                                                        <0 28 0x1 0x0>; /* PA28 periph A */
+                                        };
+
+                                        pinctrl_usart0_cts: usart0_cts-0 {
+                                                atmel,pins =
+                                                        <0 29 0x1 0x0>; /* PA29 periph A */
                                         };
                                 };
 
@@ -134,10 +138,14 @@
                                                          3 1 0x1 0x0>;  /* PD1 periph A */
                                         };
 
-                                        pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
+                                        pinctrl_usart1_rts: usart1_rts-0 {
                                                 atmel,pins =
-                                                        <3 7 0x2 0x0    /* PD7 periph B */
-                                                         3 8 0x2 0x0>;  /* PD8 periph B */
+                                                        <3 7 0x2 0x0>;  /* PD7 periph B */
+                                        };
+
+                                        pinctrl_usart1_cts: usart1_cts-0 {
+                                                atmel,pins =
+                                                        <3 8 0x2 0x0>;  /* PD8 periph B */
                                         };
                                 };
 
@@ -148,10 +156,14 @@
                                                          3 3 0x1 0x0>;  /* PD3 periph A */
                                         };
 
-                                        pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
+                                        pinctrl_usart2_rts: usart2_rts-0 {
+                                                atmel,pins =
+                                                        <3 5 0x2 0x0>;  /* PD5 periph B */
+                                        };
+
+                                        pinctrl_usart2_cts: usart2_cts-0 {
                                                 atmel,pins =
-                                                        <3 5 0x2 0x0    /* PD5 periph B */
-                                                         4 6 0x2 0x0>;  /* PD6 periph B */
+                                                        <4 6 0x2 0x0>;  /* PD6 periph B */
                                         };
                                 };