ARM: at91/dts: add pinctrl support for SSC peripheral

Add pinctrl support for SSC on AT91 dtsi files.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[nicolas.ferre@atmel.com: split dtsi and driver changes]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reluctantly-acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

1 files changed, 36 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 32ec62cf5385..271d4de026e9 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -271,6 +271,38 @@
                                         };
                                 };
 
+                                ssc0 {
+                                        pinctrl_ssc0_tx: ssc0_tx-0 {
+                                                atmel,pins =
+                                                        <1 0 0x2 0x0    /* PB0 periph B */
+                                                         1 1 0x2 0x0    /* PB1 periph B */
+                                                         1 2 0x2 0x0>;  /* PB2 periph B */
+                                        };
+
+                                        pinctrl_ssc0_rx: ssc0_rx-0 {
+                                                atmel,pins =
+                                                        <1 3 0x2 0x0    /* PB3 periph B */
+                                                         1 4 0x2 0x0    /* PB4 periph B */
+                                                         1 5 0x2 0x0>;  /* PB5 periph B */
+                                        };
+                                };
+
+                                ssc1 {
+                                        pinctrl_ssc1_tx: ssc1_tx-0 {
+                                                atmel,pins =
+                                                        <1 6 0x1 0x0    /* PB6 periph A */
+                                                         1 7 0x1 0x0    /* PB7 periph A */
+                                                         1 8 0x1 0x0>;  /* PB8 periph A */
+                                        };
+
+                                        pinctrl_ssc1_rx: ssc1_rx-0 {
+                                                atmel,pins =
+                                                        <1 9 0x1 0x0    /* PB9 periph A */
+                                                         1 10 0x1 0x0   /* PB10 periph A */
+                                                         1 11 0x1 0x0>; /* PB11 periph A */
+                                        };
+                                };
+
                                 pioA: gpio@fffff200 {
                                         compatible = "atmel,at91rm9200-gpio";
                                         reg = <0xfffff200 0x200>;
@@ -368,6 +400,8 @@
                                 compatible = "atmel,at91rm9200-ssc";
                                 reg = <0xfff98000 0x4000>;
                                 interrupts = <16 4 5>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
                                 status = "disabled";
                         };
 
@@ -375,6 +409,8 @@
                                 compatible = "atmel,at91rm9200-ssc";
                                 reg = <0xfff9c000 0x4000>;
                                 interrupts = <17 4 5>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
                                 status = "disabled";
                         };