diff options
author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2013-04-09 17:06:34 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2013-04-15 10:53:19 -0400 |
commit | 9d8f44f02d4a5f6e7b8d138ea8f8c6e30ae6e1a3 (patch) | |
tree | 4c7ad0350ed597537fc7ac545d0314a27f735291 /arch/arm/boot/dts/armada-xp-mv78460.dtsi | |
parent | a09a0b7c6ff122e3e74efab2565ded2a4bbef854 (diff) |
arm: mvebu: add PCIe Device Tree informations for Armada XP
The Armada XP SoCs have multiple PCIe interfaces. The MV78230 has 2
PCIe units (one 4x or quad 1x, the other 1x only), the MV78260 has 3
PCIe units (two 4x or quad 1x and one 4x/1x), the MV78460 has 4 PCIe
units (two 4x or quad 1x and two 4x/1x). We therefore add the
necessary Device Tree informations to make those PCIe interfaces
usable.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-mv78460.dtsi')
-rw-r--r-- | arch/arm/boot/dts/armada-xp-mv78460.dtsi | 188 |
1 files changed, 188 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 936c25dc32b0..23a5ac4490a8 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi | |||
@@ -111,5 +111,193 @@ | |||
111 | clocks = <&gateclk 1>; | 111 | clocks = <&gateclk 1>; |
112 | status = "disabled"; | 112 | status = "disabled"; |
113 | }; | 113 | }; |
114 | |||
115 | /* | ||
116 | * MV78460 has 4 PCIe units Gen2.0: Two units can be | ||
117 | * configured as x4 or quad x1 lanes. Two units are | ||
118 | * x4/x1. | ||
119 | */ | ||
120 | pcie-controller { | ||
121 | compatible = "marvell,armada-xp-pcie"; | ||
122 | status = "disabled"; | ||
123 | device_type = "pci"; | ||
124 | |||
125 | #address-cells = <3>; | ||
126 | #size-cells = <2>; | ||
127 | |||
128 | bus-range = <0x00 0xff>; | ||
129 | |||
130 | ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ | ||
131 | 0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */ | ||
132 | 0x82000000 0 0xd0044000 0xd0044000 0 0x00002000 /* Port 0.1 registers */ | ||
133 | 0x82000000 0 0xd0048000 0xd0048000 0 0x00002000 /* Port 0.2 registers */ | ||
134 | 0x82000000 0 0xd004c000 0xd004c000 0 0x00002000 /* Port 0.3 registers */ | ||
135 | 0x82000000 0 0xd0080000 0xd0080000 0 0x00002000 /* Port 1.0 registers */ | ||
136 | 0x82000000 0 0xd0082000 0xd0082000 0 0x00002000 /* Port 3.0 registers */ | ||
137 | 0x82000000 0 0xd0084000 0xd0084000 0 0x00002000 /* Port 1.1 registers */ | ||
138 | 0x82000000 0 0xd0088000 0xd0088000 0 0x00002000 /* Port 1.2 registers */ | ||
139 | 0x82000000 0 0xd008c000 0xd008c000 0 0x00002000 /* Port 1.3 registers */ | ||
140 | 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ | ||
141 | 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ | ||
142 | |||
143 | pcie@1,0 { | ||
144 | device_type = "pci"; | ||
145 | assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; | ||
146 | reg = <0x0800 0 0 0 0>; | ||
147 | #address-cells = <3>; | ||
148 | #size-cells = <2>; | ||
149 | #interrupt-cells = <1>; | ||
150 | ranges; | ||
151 | interrupt-map-mask = <0 0 0 0>; | ||
152 | interrupt-map = <0 0 0 0 &mpic 58>; | ||
153 | marvell,pcie-port = <0>; | ||
154 | marvell,pcie-lane = <0>; | ||
155 | clocks = <&gateclk 5>; | ||
156 | status = "disabled"; | ||
157 | }; | ||
158 | |||
159 | pcie@2,0 { | ||
160 | device_type = "pci"; | ||
161 | assigned-addresses = <0x82001000 0 0xd0044000 0 0x2000>; | ||
162 | reg = <0x1000 0 0 0 0>; | ||
163 | #address-cells = <3>; | ||
164 | #size-cells = <2>; | ||
165 | #interrupt-cells = <1>; | ||
166 | ranges; | ||
167 | interrupt-map-mask = <0 0 0 0>; | ||
168 | interrupt-map = <0 0 0 0 &mpic 59>; | ||
169 | marvell,pcie-port = <0>; | ||
170 | marvell,pcie-lane = <1>; | ||
171 | clocks = <&gateclk 6>; | ||
172 | status = "disabled"; | ||
173 | }; | ||
174 | |||
175 | pcie@3,0 { | ||
176 | device_type = "pci"; | ||
177 | assigned-addresses = <0x82001800 0 0xd0048000 0 0x2000>; | ||
178 | reg = <0x1800 0 0 0 0>; | ||
179 | #address-cells = <3>; | ||
180 | #size-cells = <2>; | ||
181 | #interrupt-cells = <1>; | ||
182 | ranges; | ||
183 | interrupt-map-mask = <0 0 0 0>; | ||
184 | interrupt-map = <0 0 0 0 &mpic 60>; | ||
185 | marvell,pcie-port = <0>; | ||
186 | marvell,pcie-lane = <2>; | ||
187 | clocks = <&gateclk 7>; | ||
188 | status = "disabled"; | ||
189 | }; | ||
190 | |||
191 | pcie@4,0 { | ||
192 | device_type = "pci"; | ||
193 | assigned-addresses = <0x82002000 0 0xd004c000 0 0x2000>; | ||
194 | reg = <0x2000 0 0 0 0>; | ||
195 | #address-cells = <3>; | ||
196 | #size-cells = <2>; | ||
197 | #interrupt-cells = <1>; | ||
198 | ranges; | ||
199 | interrupt-map-mask = <0 0 0 0>; | ||
200 | interrupt-map = <0 0 0 0 &mpic 61>; | ||
201 | marvell,pcie-port = <0>; | ||
202 | marvell,pcie-lane = <3>; | ||
203 | clocks = <&gateclk 8>; | ||
204 | status = "disabled"; | ||
205 | }; | ||
206 | |||
207 | pcie@5,0 { | ||
208 | device_type = "pci"; | ||
209 | assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>; | ||
210 | reg = <0x2800 0 0 0 0>; | ||
211 | #address-cells = <3>; | ||
212 | #size-cells = <2>; | ||
213 | #interrupt-cells = <1>; | ||
214 | ranges; | ||
215 | interrupt-map-mask = <0 0 0 0>; | ||
216 | interrupt-map = <0 0 0 0 &mpic 62>; | ||
217 | marvell,pcie-port = <1>; | ||
218 | marvell,pcie-lane = <0>; | ||
219 | clocks = <&gateclk 9>; | ||
220 | status = "disabled"; | ||
221 | }; | ||
222 | |||
223 | pcie@6,0 { | ||
224 | device_type = "pci"; | ||
225 | assigned-addresses = <0x82003000 0 0xd0084000 0 0x2000>; | ||
226 | reg = <0x3000 0 0 0 0>; | ||
227 | #address-cells = <3>; | ||
228 | #size-cells = <2>; | ||
229 | #interrupt-cells = <1>; | ||
230 | ranges; | ||
231 | interrupt-map-mask = <0 0 0 0>; | ||
232 | interrupt-map = <0 0 0 0 &mpic 63>; | ||
233 | marvell,pcie-port = <1>; | ||
234 | marvell,pcie-lane = <1>; | ||
235 | clocks = <&gateclk 10>; | ||
236 | status = "disabled"; | ||
237 | }; | ||
238 | |||
239 | pcie@7,0 { | ||
240 | device_type = "pci"; | ||
241 | assigned-addresses = <0x82003800 0 0xd0088000 0 0x2000>; | ||
242 | reg = <0x3800 0 0 0 0>; | ||
243 | #address-cells = <3>; | ||
244 | #size-cells = <2>; | ||
245 | #interrupt-cells = <1>; | ||
246 | ranges; | ||
247 | interrupt-map-mask = <0 0 0 0>; | ||
248 | interrupt-map = <0 0 0 0 &mpic 64>; | ||
249 | marvell,pcie-port = <1>; | ||
250 | marvell,pcie-lane = <2>; | ||
251 | clocks = <&gateclk 11>; | ||
252 | status = "disabled"; | ||
253 | }; | ||
254 | |||
255 | pcie@8,0 { | ||
256 | device_type = "pci"; | ||
257 | assigned-addresses = <0x82004000 0 0xd008c000 0 0x2000>; | ||
258 | reg = <0x4000 0 0 0 0>; | ||
259 | #address-cells = <3>; | ||
260 | #size-cells = <2>; | ||
261 | #interrupt-cells = <1>; | ||
262 | ranges; | ||
263 | interrupt-map-mask = <0 0 0 0>; | ||
264 | interrupt-map = <0 0 0 0 &mpic 65>; | ||
265 | marvell,pcie-port = <1>; | ||
266 | marvell,pcie-lane = <3>; | ||
267 | clocks = <&gateclk 12>; | ||
268 | status = "disabled"; | ||
269 | }; | ||
270 | pcie@9,0 { | ||
271 | device_type = "pci"; | ||
272 | assigned-addresses = <0x82004800 0 0xd0042000 0 0x2000>; | ||
273 | reg = <0x4800 0 0 0 0>; | ||
274 | #address-cells = <3>; | ||
275 | #size-cells = <2>; | ||
276 | #interrupt-cells = <1>; | ||
277 | ranges; | ||
278 | interrupt-map-mask = <0 0 0 0>; | ||
279 | interrupt-map = <0 0 0 0 &mpic 99>; | ||
280 | marvell,pcie-port = <2>; | ||
281 | marvell,pcie-lane = <0>; | ||
282 | clocks = <&gateclk 26>; | ||
283 | status = "disabled"; | ||
284 | }; | ||
285 | |||
286 | pcie@10,0 { | ||
287 | device_type = "pci"; | ||
288 | assigned-addresses = <0x82005000 0 0xd0082000 0 0x2000>; | ||
289 | reg = <0x5000 0 0 0 0>; | ||
290 | #address-cells = <3>; | ||
291 | #size-cells = <2>; | ||
292 | #interrupt-cells = <1>; | ||
293 | ranges; | ||
294 | interrupt-map-mask = <0 0 0 0>; | ||
295 | interrupt-map = <0 0 0 0 &mpic 103>; | ||
296 | marvell,pcie-port = <3>; | ||
297 | marvell,pcie-lane = <0>; | ||
298 | clocks = <&gateclk 27>; | ||
299 | status = "disabled"; | ||
300 | }; | ||
301 | }; | ||
114 | }; | 302 | }; |
115 | }; | 303 | }; |