ARM: dts: mvebu: Convert all the mvebu files to use the range property

This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

1 files changed, 29 insertions, 29 deletions

diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index b9da5b8ae288..ce4f80a82854 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -62,7 +62,7 @@
         soc {
                 pinctrl {
                         compatible = "marvell,mv78460-pinctrl";
-                        reg = <0xd0018000 0x38>;
+                        reg = <0x18000 0x38>;
 
                         sdio_pins: sdio-pins {
                                 marvell,pins = "mpp30", "mpp31", "mpp32",
@@ -71,9 +71,9 @@
                         };
                 };
 
-                gpio0: gpio@d0018100 {
+                gpio0: gpio@18100 {
                         compatible = "marvell,orion-gpio";
-                        reg = <0xd0018100 0x40>;
+                        reg = <0x18100 0x40>;
                         ngpios = <32>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -82,9 +82,9 @@
                         interrupts = <82>, <83>, <84>, <85>;
                 };
 
-                gpio1: gpio@d0018140 {
+                gpio1: gpio@18140 {
                         compatible = "marvell,orion-gpio";
-                        reg = <0xd0018140 0x40>;
+                        reg = <0x18140 0x40>;
                         ngpios = <32>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -93,9 +93,9 @@
                         interrupts = <87>, <88>, <89>, <90>;
                 };
 
-                gpio2: gpio@d0018180 {
+                gpio2: gpio@18180 {
                         compatible = "marvell,orion-gpio";
-                        reg = <0xd0018180 0x40>;
+                        reg = <0x18180 0x40>;
                         ngpios = <3>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -104,9 +104,9 @@
                         interrupts = <91>;
                 };
 
-                ethernet@d0034000 {
+                ethernet@34000 {
                                 compatible = "marvell,armada-370-neta";
-                                reg = <0xd0034000 0x2500>;
+                                reg = <0x34000 0x2500>;
                                 interrupts = <14>;
                                 clocks = <&gateclk 1>;
                                 status = "disabled";
@@ -127,22 +127,22 @@
 
                         bus-range = <0x00 0xff>;
 
-                        ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000   /* Port 0.0 registers */
-                                  0x82000000 0 0xd0042000 0xd0042000 0 0x00002000   /* Port 2.0 registers */
-                                  0x82000000 0 0xd0044000 0xd0044000 0 0x00002000   /* Port 0.1 registers */
-                                  0x82000000 0 0xd0048000 0xd0048000 0 0x00002000   /* Port 0.2 registers */
-                                  0x82000000 0 0xd004c000 0xd004c000 0 0x00002000   /* Port 0.3 registers */
-                                  0x82000000 0 0xd0080000 0xd0080000 0 0x00002000   /* Port 1.0 registers */
-                                  0x82000000 0 0xd0082000 0xd0082000 0 0x00002000   /* Port 3.0 registers */
-                                  0x82000000 0 0xd0084000 0xd0084000 0 0x00002000   /* Port 1.1 registers */
-                                  0x82000000 0 0xd0088000 0xd0088000 0 0x00002000   /* Port 1.2 registers */
-                                  0x82000000 0 0xd008c000 0xd008c000 0 0x00002000   /* Port 1.3 registers */
+                        ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000   /* Port 0.0 registers */
+                                  0x82000000 0 0x42000 0x42000 0 0x00002000   /* Port 2.0 registers */
+                                  0x82000000 0 0x44000 0x44000 0 0x00002000   /* Port 0.1 registers */
+                                  0x82000000 0 0x48000 0x48000 0 0x00002000   /* Port 0.2 registers */
+                                  0x82000000 0 0x4c000 0x4c000 0 0x00002000   /* Port 0.3 registers */
+                                  0x82000000 0 0x80000 0x80000 0 0x00002000   /* Port 1.0 registers */
+                                  0x82000000 0 0x82000 0x82000 0 0x00002000   /* Port 3.0 registers */
+                                  0x82000000 0 0x84000 0x84000 0 0x00002000   /* Port 1.1 registers */
+                                  0x82000000 0 0x88000 0x88000 0 0x00002000   /* Port 1.2 registers */
+                                  0x82000000 0 0x8c000 0x8c000 0 0x00002000   /* Port 1.3 registers */
                                   0x82000000 0 0xe0000000 0xe0000000 0 0x08000000   /* non-prefetchable memory */
                                   0x81000000 0 0          0xe8000000 0 0x00100000>; /* downstream I/O */
 
                         pcie@1,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>;
+                                assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
                                 reg = <0x0800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -158,7 +158,7 @@
 
                         pcie@2,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82001000 0 0xd0044000 0 0x2000>;
+                                assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
                                 reg = <0x1000 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -174,7 +174,7 @@
 
                         pcie@3,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82001800 0 0xd0048000 0 0x2000>;
+                                assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
                                 reg = <0x1800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -190,7 +190,7 @@
 
                         pcie@4,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82002000 0 0xd004c000 0 0x2000>;
+                                assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
                                 reg = <0x2000 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -206,7 +206,7 @@
 
                         pcie@5,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>;
+                                assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
                                 reg = <0x2800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -222,7 +222,7 @@
 
                         pcie@6,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82003000 0 0xd0084000 0 0x2000>;
+                                assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
                                 reg = <0x3000 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -238,7 +238,7 @@
 
                         pcie@7,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82003800 0 0xd0088000 0 0x2000>;
+                                assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
                                 reg = <0x3800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -254,7 +254,7 @@
 
                         pcie@8,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82004000 0 0xd008c000 0 0x2000>;
+                                assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
                                 reg = <0x4000 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -269,7 +269,7 @@
                         };
                         pcie@9,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82004800 0 0xd0042000 0 0x2000>;
+                                assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
                                 reg = <0x4800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
@@ -285,7 +285,7 @@
 
                         pcie@10,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82005000 0 0xd0082000 0 0x2000>;
+                                assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
                                 reg = <0x5000 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;