diff options
author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-05-17 07:09:58 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2013-05-19 15:36:56 -0400 |
commit | b484ff42df475c5087d614c4d477273e1906bcb9 (patch) | |
tree | b3cea22fc851c1dc4a848f503399ff1f39bb82b8 /arch/arm/boot/dts/armada-xp-db.dts | |
parent | ee514b381e17958fde5b99cba506f31ea6589c0b (diff) |
ARM: mvebu: Add support for NOR flash device on Armada XP-DB board
The Armada XP Development Board (DB-78460-BP) has a NOR flash device
connected to the Device Bus. This commit adds the device tree node
to support this device.
This SoC supports a flexible and dynamic decoding window allocation
scheme; but since this feature is still not implemented we need
to specify the window base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-db.dts')
-rw-r--r-- | arch/arm/boot/dts/armada-xp-db.dts | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index 7c22a20d51b5..f5fc1a3868a2 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts | |||
@@ -30,6 +30,9 @@ | |||
30 | }; | 30 | }; |
31 | 31 | ||
32 | soc { | 32 | soc { |
33 | ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */ | ||
34 | 0xf0000000 0 0xf0000000 0x1000000>; /* Device Bus, NOR 16MiB */ | ||
35 | |||
33 | internal-regs { | 36 | internal-regs { |
34 | serial@12000 { | 37 | serial@12000 { |
35 | clock-frequency = <250000000>; | 38 | clock-frequency = <250000000>; |
@@ -156,6 +159,35 @@ | |||
156 | status = "okay"; | 159 | status = "okay"; |
157 | }; | 160 | }; |
158 | }; | 161 | }; |
162 | |||
163 | devbus-bootcs@10400 { | ||
164 | status = "okay"; | ||
165 | ranges = <0 0xf0000000 0x1000000>; | ||
166 | |||
167 | /* Device Bus parameters are required */ | ||
168 | |||
169 | /* Read parameters */ | ||
170 | devbus,bus-width = <8>; | ||
171 | devbus,turn-off-ps = <60000>; | ||
172 | devbus,badr-skew-ps = <0>; | ||
173 | devbus,acc-first-ps = <124000>; | ||
174 | devbus,acc-next-ps = <248000>; | ||
175 | devbus,rd-setup-ps = <0>; | ||
176 | devbus,rd-hold-ps = <0>; | ||
177 | |||
178 | /* Write parameters */ | ||
179 | devbus,sync-enable = <0>; | ||
180 | devbus,wr-high-ps = <60000>; | ||
181 | devbus,wr-low-ps = <60000>; | ||
182 | devbus,ale-wr-ps = <60000>; | ||
183 | |||
184 | /* NOR 16 MiB */ | ||
185 | nor@0 { | ||
186 | compatible = "cfi-flash"; | ||
187 | reg = <0 0x1000000>; | ||
188 | bank-width = <2>; | ||
189 | }; | ||
190 | }; | ||
159 | }; | 191 | }; |
160 | }; | 192 | }; |
161 | }; | 193 | }; |