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authorLinus Walleij <linus.walleij@linaro.org>2014-10-08 09:15:17 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-10-22 07:49:08 -0400
commit75fd1324f91a87655993b52493f2e868b081414b (patch)
tree2ea199b066de9a6a5c721b505bafa6f57b26a13f /arch/arm/boot/dts/arm-realview-pb1176.dts
parentc7eb3f4a1bf59ec10e54bcb74b4ce2150f2b5615 (diff)
ARM: realview: add PL061 GPIO to the PB1176 DTS
This adds the PL061 GPIO instances found on the PB1176 devchip and the FPGA to the DTS file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/arm-realview-pb1176.dts')
-rw-r--r--arch/arm/boot/dts/arm-realview-pb1176.dts39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm-realview-pb1176.dts
index f780adde2332..4721244a16d6 100644
--- a/arch/arm/boot/dts/arm-realview-pb1176.dts
+++ b/arch/arm/boot/dts/arm-realview-pb1176.dts
@@ -196,6 +196,19 @@
196 clock-names = "timer1", "timer2", "apb_pclk"; 196 clock-names = "timer1", "timer2", "apb_pclk";
197 }; 197 };
198 198
199 pb1176_gpio0: gpio@1010a000 {
200 compatible = "arm,pl061", "arm,primecell";
201 reg = <0x1010a000 0x1000>;
202 gpio-controller;
203 interrupt-parent = <&intc_dc1176>;
204 interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>;
206 interrupt-controller;
207 #interrupt-cells = <2>;
208 clocks = <&pclk>;
209 clock-names = "apb_pclk";
210 };
211
199 pb1176_serial0: serial@1010c000 { 212 pb1176_serial0: serial@1010c000 {
200 compatible = "arm,pl011", "arm,primecell"; 213 compatible = "arm,pl011", "arm,primecell";
201 reg = <0x1010c000 0x1000>; 214 reg = <0x1010c000 0x1000>;
@@ -251,5 +264,31 @@
251 interrupt-parent = <&intc_dc1176>; 264 interrupt-parent = <&intc_dc1176>;
252 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; 265 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
253 }; 266 };
267
268 fpga_gpio0: gpio@10014000 {
269 compatible = "arm,pl061", "arm,primecell";
270 reg = <0x10014000 0x1000>;
271 gpio-controller;
272 interrupt-parent = <&intc_fpga1176>;
273 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
274 #gpio-cells = <2>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
277 clocks = <&pclk>;
278 clock-names = "apb_pclk";
279 };
280
281 fpga_gpio1: gpio@10015000 {
282 compatible = "arm,pl061", "arm,primecell";
283 reg = <0x10015000 0x1000>;
284 gpio-controller;
285 interrupt-parent = <&intc_fpga1176>;
286 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
287 #gpio-cells = <2>;
288 interrupt-controller;
289 #interrupt-cells = <2>;
290 clocks = <&pclk>;
291 clock-names = "apb_pclk";
292 };
254 }; 293 };
255}; 294};