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authorHyok S. Choi <hyok.choi@samsung.com>2006-09-26 04:36:37 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-27 12:34:30 -0400
commitf12d0d7c7786af39435ef6ae9defe47fb58f6091 (patch)
tree03361f2b925754f2acf4f311df2122f844d3d4fe /arch/arm/boot/compressed
parentfefdaa06ccdde394be865ed76509be82813e425b (diff)
[ARM] nommu: manage the CP15 things
All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot/compressed')
-rw-r--r--arch/arm/boot/compressed/Makefile4
-rw-r--r--arch/arm/boot/compressed/head.S6
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 2adc1527e0eb..adddc7131685 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -51,7 +51,11 @@ OBJS += head-at91rm9200.o
51endif 51endif
52 52
53ifeq ($(CONFIG_CPU_BIG_ENDIAN),y) 53ifeq ($(CONFIG_CPU_BIG_ENDIAN),y)
54ifeq ($(CONFIG_CPU_CP15),y)
54OBJS += big-endian.o 55OBJS += big-endian.o
56else
57# The endian should be set by h/w design.
58endif
55endif 59endif
56 60
57# 61#
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 75df1f764a10..e5ab51b9cceb 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -82,9 +82,11 @@
82 kphex r6, 8 /* processor id */ 82 kphex r6, 8 /* processor id */
83 kputc #':' 83 kputc #':'
84 kphex r7, 8 /* architecture id */ 84 kphex r7, 8 /* architecture id */
85#ifdef CONFIG_CPU_CP15
85 kputc #':' 86 kputc #':'
86 mrc p15, 0, r0, c1, c0 87 mrc p15, 0, r0, c1, c0
87 kphex r0, 8 /* control reg */ 88 kphex r0, 8 /* control reg */
89#endif
88 kputc #'\n' 90 kputc #'\n'
89 kphex r5, 8 /* decompressed kernel start */ 91 kphex r5, 8 /* decompressed kernel start */
90 kputc #'-' 92 kputc #'-'
@@ -507,7 +509,11 @@ call_kernel: bl cache_clean_flush
507 */ 509 */
508 510
509call_cache_fn: adr r12, proc_types 511call_cache_fn: adr r12, proc_types
512#ifdef CONFIG_CPU_CP15
510 mrc p15, 0, r6, c0, c0 @ get processor ID 513 mrc p15, 0, r6, c0, c0 @ get processor ID
514#else
515 ldr r6, =CONFIG_PROCESSOR_ID
516#endif
5111: ldr r1, [r12, #0] @ get value 5171: ldr r1, [r12, #0] @ get value
512 ldr r2, [r12, #4] @ get mask 518 ldr r2, [r12, #4] @ get mask
513 eor r1, r1, r6 @ (real ^ match) 519 eor r1, r1, r6 @ (real ^ match)