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authorTony Lindgren <tony@atomide.com>2010-01-19 10:40:07 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-01-19 15:23:16 -0500
commit200b7a8dc09504bc0aedac567a307a6e533f39e5 (patch)
treeec735fed9611efcbafd4982cb015eab58b552f27 /arch/arm/boot/compressed
parenta7b22962776109b5bfe3a3efa4f42622318c547d (diff)
ARM: 5884/1: arm: Fix DCC console for v7
Without this patch arch/arm/compressed/head.S defaults to generic DCC code that does not work for v7. For more information on the v7 DCC, see Cortex-A8 TRM "12.11.1 Debug communications channel". To use it with post 2.6.33-rc1 or later, you need to have: CONFIG_DEBUG_LL=y ONFIG_DEBUG_ICEDCC=y CONFIG_EARLY_PRINTK=y Earlier kernels need commit 93fd03a8c6728b58879f8af20ffd55d9c32a778b backported. Tested on omap3430. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot/compressed')
-rw-r--r--arch/arm/boot/compressed/head.S8
-rw-r--r--arch/arm/boot/compressed/misc.c12
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index d356af7cef82..4fddc509e78e 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -27,6 +27,14 @@
27 .macro writeb, ch, rb 27 .macro writeb, ch, rb
28 mcr p14, 0, \ch, c0, c5, 0 28 mcr p14, 0, \ch, c0, c5, 0
29 .endm 29 .endm
30#elif defined(CONFIG_CPU_V7)
31 .macro loadsp, rb
32 .endm
33 .macro writeb, ch, rb
34wait: mrc p14, 0, pc, c0, c1, 0
35 bcs wait
36 mcr p14, 0, \ch, c0, c5, 0
37 .endm
30#elif defined(CONFIG_CPU_XSCALE) 38#elif defined(CONFIG_CPU_XSCALE)
31 .macro loadsp, rb 39 .macro loadsp, rb
32 .endm 40 .endm
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index af6479fae931..56a0d116d271 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -53,6 +53,18 @@ static void icedcc_putc(int ch)
53 53
54 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); 54 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
55} 55}
56
57#elif defined(CONFIG_CPU_V7)
58
59static void icedcc_putc(int ch)
60{
61 asm(
62 "wait: mrc p14, 0, pc, c0, c1, 0 \n\
63 bcs wait \n\
64 mcr p14, 0, %0, c0, c5, 0 "
65 : : "r" (ch));
66}
67
56#elif defined(CONFIG_CPU_XSCALE) 68#elif defined(CONFIG_CPU_XSCALE)
57 69
58static void icedcc_putc(int ch) 70static void icedcc_putc(int ch)