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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-03-08 15:21:04 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-03-08 15:21:04 -0500
commit988addf82e4c03739375279de73929580a2d4a6a (patch)
tree989ae1cd4e264bbad80c65f04480486246e7b9f3 /arch/arm/boot/compressed/head.S
parent004c1c7096659d352b83047a7593e91d8a30e3c5 (diff)
parent25cf84cf377c0aae5dbcf937ea89bc7893db5176 (diff)
Merge branch 'origin' into devel-stable
Conflicts: arch/arm/mach-mx2/devices.c arch/arm/mach-mx2/devices.h sound/soc/pxa/pxa-ssp.c
Diffstat (limited to 'arch/arm/boot/compressed/head.S')
-rw-r--r--arch/arm/boot/compressed/head.S20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 4fddc509e78e..99b75aa1c2ec 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -22,13 +22,13 @@
22#if defined(CONFIG_DEBUG_ICEDCC) 22#if defined(CONFIG_DEBUG_ICEDCC)
23 23
24#ifdef CONFIG_CPU_V6 24#ifdef CONFIG_CPU_V6
25 .macro loadsp, rb 25 .macro loadsp, rb, tmp
26 .endm 26 .endm
27 .macro writeb, ch, rb 27 .macro writeb, ch, rb
28 mcr p14, 0, \ch, c0, c5, 0 28 mcr p14, 0, \ch, c0, c5, 0
29 .endm 29 .endm
30#elif defined(CONFIG_CPU_V7) 30#elif defined(CONFIG_CPU_V7)
31 .macro loadsp, rb 31 .macro loadsp, rb, tmp
32 .endm 32 .endm
33 .macro writeb, ch, rb 33 .macro writeb, ch, rb
34wait: mrc p14, 0, pc, c0, c1, 0 34wait: mrc p14, 0, pc, c0, c1, 0
@@ -36,13 +36,13 @@ wait: mrc p14, 0, pc, c0, c1, 0
36 mcr p14, 0, \ch, c0, c5, 0 36 mcr p14, 0, \ch, c0, c5, 0
37 .endm 37 .endm
38#elif defined(CONFIG_CPU_XSCALE) 38#elif defined(CONFIG_CPU_XSCALE)
39 .macro loadsp, rb 39 .macro loadsp, rb, tmp
40 .endm 40 .endm
41 .macro writeb, ch, rb 41 .macro writeb, ch, rb
42 mcr p14, 0, \ch, c8, c0, 0 42 mcr p14, 0, \ch, c8, c0, 0
43 .endm 43 .endm
44#else 44#else
45 .macro loadsp, rb 45 .macro loadsp, rb, tmp
46 .endm 46 .endm
47 .macro writeb, ch, rb 47 .macro writeb, ch, rb
48 mcr p14, 0, \ch, c1, c0, 0 48 mcr p14, 0, \ch, c1, c0, 0
@@ -58,7 +58,7 @@ wait: mrc p14, 0, pc, c0, c1, 0
58 .endm 58 .endm
59 59
60#if defined(CONFIG_ARCH_SA1100) 60#if defined(CONFIG_ARCH_SA1100)
61 .macro loadsp, rb 61 .macro loadsp, rb, tmp
62 mov \rb, #0x80000000 @ physical base address 62 mov \rb, #0x80000000 @ physical base address
63#ifdef CONFIG_DEBUG_LL_SER3 63#ifdef CONFIG_DEBUG_LL_SER3
64 add \rb, \rb, #0x00050000 @ Ser3 64 add \rb, \rb, #0x00050000 @ Ser3
@@ -67,13 +67,13 @@ wait: mrc p14, 0, pc, c0, c1, 0
67#endif 67#endif
68 .endm 68 .endm
69#elif defined(CONFIG_ARCH_S3C2410) 69#elif defined(CONFIG_ARCH_S3C2410)
70 .macro loadsp, rb 70 .macro loadsp, rb, tmp
71 mov \rb, #0x50000000 71 mov \rb, #0x50000000
72 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT 72 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
73 .endm 73 .endm
74#else 74#else
75 .macro loadsp, rb 75 .macro loadsp, rb, tmp
76 addruart \rb 76 addruart \rb, \tmp
77 .endm 77 .endm
78#endif 78#endif
79#endif 79#endif
@@ -1025,7 +1025,7 @@ phex: adr r3, phexbuf
1025 strb r2, [r3, r1] 1025 strb r2, [r3, r1]
1026 b 1b 1026 b 1b
1027 1027
1028puts: loadsp r3 1028puts: loadsp r3, r1
10291: ldrb r2, [r0], #1 10291: ldrb r2, [r0], #1
1030 teq r2, #0 1030 teq r2, #0
1031 moveq pc, lr 1031 moveq pc, lr
@@ -1042,7 +1042,7 @@ puts: loadsp r3
1042putc: 1042putc:
1043 mov r2, r0 1043 mov r2, r0
1044 mov r0, #0 1044 mov r0, #0
1045 loadsp r3 1045 loadsp r3, r1
1046 b 2b 1046 b 2b
1047 1047
1048memdump: mov r12, r0 1048memdump: mov r12, r0