ARM: dma-mapping: Add maximum alignment order for dma iommu buffers

Alignment order for a dma iommu buffer is set by buffer size. For
large buffer, it is a waste of iommu address space. So configurable
parameter to limit maximum alignment order can reduce the waste.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Kyungmin.park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

1 files changed, 21 insertions, 0 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 67874b82a4ed..4e89112b57e0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -75,6 +75,27 @@ config ARM_DMA_USE_IOMMU
         select ARM_HAS_SG_CHAIN
         select NEED_SG_DMA_LENGTH
 
+if ARM_DMA_USE_IOMMU
+
+config ARM_DMA_IOMMU_ALIGNMENT
+        int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
+        range 4 9
+        default 8
+        help
+          DMA mapping framework by default aligns all buffers to the smallest
+          PAGE_SIZE order which is greater than or equal to the requested buffer
+          size. This works well for buffers up to a few hundreds kilobytes, but
+          for larger buffers it just a waste of address space. Drivers which has
+          relatively small addressing window (like 64Mib) might run out of
+          virtual space with just a few allocations.
+
+          With this parameter you can specify the maximum PAGE_SIZE order for
+          DMA IOMMU buffers. Larger buffers will be aligned only to this
+          specified order. The order is expressed as a power of two multiplied
+          by the PAGE_SIZE.
+
+endif
+
 config HAVE_PWM
         bool