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authorArnd Bergmann <arnd@arndb.de>2013-04-09 10:40:45 -0400
committerArnd Bergmann <arnd@arndb.de>2013-04-09 10:40:45 -0400
commitb8250dc4192c6adab0b9a713a11bf19afc462c96 (patch)
tree830299d0edad314367e075012ef9ca841a3026d1 /arch/arm/Kconfig
parent56734ee2835caaf62168c28281403b61b5826841 (diff)
parent7a9819950f47dbf319895ee78220f2761f3687a3 (diff)
Merge tag 'omap-for-v3.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren <tony@atomide.com>: Changes needed for enabling SOC_BUS for the SoC revision information. Also enable few HW errata workarounds for omap4. * tag 'omap-for-v3.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (236 commits) ARM: OMAP4: Enable fix for Cortex-A9 erratas ARM: OMAP2+: Export SoC information to userspace ARM: OMAP2+: SoC name and revision unification ARM: OMAP2+: Move common part of late init into common function Includes an update to Linux 3.9-rc6 Conflicts: arch/arm/mach-omap2/cclock44xx_data.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b6f3dd8ec48f..f11182598b44 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1184,9 +1184,9 @@ config ARM_NR_BANKS
1184 default 8 1184 default 8
1185 1185
1186config IWMMXT 1186config IWMMXT
1187 bool "Enable iWMMXt support" 1187 bool "Enable iWMMXt support" if !CPU_PJ4
1188 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1188 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1189 default y if PXA27x || PXA3xx || ARCH_MMP 1189 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
1190 help 1190 help
1191 Enable support for iWMMXt context switching at run time if 1191 Enable support for iWMMXt context switching at run time if
1192 running on a CPU that supports it. 1192 running on a CPU that supports it.
@@ -1440,6 +1440,16 @@ config ARM_ERRATA_775420
1440 to deadlock. This workaround puts DSB before executing ISB if 1440 to deadlock. This workaround puts DSB before executing ISB if
1441 an abort may occur on cache maintenance. 1441 an abort may occur on cache maintenance.
1442 1442
1443config ARM_ERRATA_798181
1444 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1445 depends on CPU_V7 && SMP
1446 help
1447 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1448 adequately shooting down all use of the old entries. This
1449 option enables the Linux kernel workaround for this erratum
1450 which sends an IPI to the CPUs that are running the same ASID
1451 as the one being invalidated.
1452
1443endmenu 1453endmenu
1444 1454
1445source "arch/arm/common/Kconfig" 1455source "arch/arm/common/Kconfig"