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authorMauro Carvalho Chehab <mchehab@redhat.com>2013-01-24 15:49:18 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-01-24 15:49:18 -0500
commita32f7d1ad3744914273c6907204c2ab3b5d496a0 (patch)
tree1c5ae321ee85665707177547c07810ff7e09e1ab /arch/arm/Kconfig
parent6b9e50c463efc5c361496ae6a895cc966ff8025b (diff)
parent68d6f84ba0c47e658beff3a4bf0c43acee4b4690 (diff)
Merge branch 'v4l_for_linus' into staging/for_v3.9
* v4l_for_linus: (464 commits) [media] uvcvideo: Set error_idx properly for S_EXT_CTRLS failures [media] uvcvideo: Cleanup leftovers of partial revert [media] uvcvideo: Return -EACCES when trying to set a read-only control Linux 3.8-rc3 mm: reinstante dropped pmd_trans_splitting() check cred: Remove tgcred pointer from struct cred drm/ttm: fix fence locking in ttm_buffer_object_transfer ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms drm/prime: drop reference on imported dma-buf come from gem xen/netfront: improve truesize tracking ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array sctp: fix Kconfig bug in default cookie hmac selection EDAC: Cleanup device deregistering path ... Conflicts: drivers/media/pci/dm1105/dm1105.c drivers/media/platform/soc_camera/mx2_camera.c
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f95ba14ae3d0..67874b82a4ed 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -371,7 +371,6 @@ config ARCH_CNS3XXX
371config ARCH_CLPS711X 371config ARCH_CLPS711X
372 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" 372 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
373 select ARCH_REQUIRE_GPIOLIB 373 select ARCH_REQUIRE_GPIOLIB
374 select ARCH_USES_GETTIMEOFFSET
375 select AUTO_ZRELADDR 374 select AUTO_ZRELADDR
376 select CLKDEV_LOOKUP 375 select CLKDEV_LOOKUP
377 select COMMON_CLK 376 select COMMON_CLK
@@ -1230,6 +1229,7 @@ config ARM_ERRATA_430973
1230config ARM_ERRATA_458693 1229config ARM_ERRATA_458693
1231 bool "ARM errata: Processor deadlock when a false hazard is created" 1230 bool "ARM errata: Processor deadlock when a false hazard is created"
1232 depends on CPU_V7 1231 depends on CPU_V7
1232 depends on !ARCH_MULTIPLATFORM
1233 help 1233 help
1234 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1234 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1235 erratum. For very specific sequences of memory operations, it is 1235 erratum. For very specific sequences of memory operations, it is
@@ -1243,6 +1243,7 @@ config ARM_ERRATA_458693
1243config ARM_ERRATA_460075 1243config ARM_ERRATA_460075
1244 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1244 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1245 depends on CPU_V7 1245 depends on CPU_V7
1246 depends on !ARCH_MULTIPLATFORM
1246 help 1247 help
1247 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1248 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1248 erratum. Any asynchronous access to the L2 cache may encounter a 1249 erratum. Any asynchronous access to the L2 cache may encounter a
@@ -1255,6 +1256,7 @@ config ARM_ERRATA_460075
1255config ARM_ERRATA_742230 1256config ARM_ERRATA_742230
1256 bool "ARM errata: DMB operation may be faulty" 1257 bool "ARM errata: DMB operation may be faulty"
1257 depends on CPU_V7 && SMP 1258 depends on CPU_V7 && SMP
1259 depends on !ARCH_MULTIPLATFORM
1258 help 1260 help
1259 This option enables the workaround for the 742230 Cortex-A9 1261 This option enables the workaround for the 742230 Cortex-A9
1260 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1262 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
@@ -1267,6 +1269,7 @@ config ARM_ERRATA_742230
1267config ARM_ERRATA_742231 1269config ARM_ERRATA_742231
1268 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1270 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1269 depends on CPU_V7 && SMP 1271 depends on CPU_V7 && SMP
1272 depends on !ARCH_MULTIPLATFORM
1270 help 1273 help
1271 This option enables the workaround for the 742231 Cortex-A9 1274 This option enables the workaround for the 742231 Cortex-A9
1272 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1275 (r2p0..r2p2) erratum. Under certain conditions, specific to the
@@ -1317,6 +1320,7 @@ config PL310_ERRATA_727915
1317config ARM_ERRATA_743622 1320config ARM_ERRATA_743622
1318 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1321 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1319 depends on CPU_V7 1322 depends on CPU_V7
1323 depends on !ARCH_MULTIPLATFORM
1320 help 1324 help
1321 This option enables the workaround for the 743622 Cortex-A9 1325 This option enables the workaround for the 743622 Cortex-A9
1322 (r2p*) erratum. Under very rare conditions, a faulty 1326 (r2p*) erratum. Under very rare conditions, a faulty
@@ -1330,6 +1334,7 @@ config ARM_ERRATA_743622
1330config ARM_ERRATA_751472 1334config ARM_ERRATA_751472
1331 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1335 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1332 depends on CPU_V7 1336 depends on CPU_V7
1337 depends on !ARCH_MULTIPLATFORM
1333 help 1338 help
1334 This option enables the workaround for the 751472 Cortex-A9 (prior 1339 This option enables the workaround for the 751472 Cortex-A9 (prior
1335 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1340 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the