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authorCatalin Marinas <catalin.marinas@arm.com>2009-05-30 09:00:18 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2009-05-30 09:00:18 -0400
commit85d6943af50537d3aec58b967ffbd3fec88453e9 (patch)
tree2033d95a7a57f792856cc08e1bd77f01386c5ed6 /arch/arm/Kconfig
parent26584853a44c58f3d6ac7360d697a2ddcd1a3efa (diff)
Fix the VFP handling on the Feroceon CPU
This CPU generates synchronous VFP exceptions in a non-standard way - the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP subarchitecture 2. The main problem is that the faulty instruction (which needs to be emulated in software) will be restarted several times (normally until a context switch disables the VFP). This patch ensures that the VFP exception is treated as synchronous. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Nicolas Pitre <nico@cam.org>
Diffstat (limited to 'arch/arm/Kconfig')
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