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authorVineet Gupta <vgupta@synopsys.com>2013-05-13 07:53:58 -0400
committerVineet Gupta <vgupta@synopsys.com>2013-06-22 09:53:19 -0400
commit2ed21dae021db1f9f988494ceee519290217520d (patch)
treed7354ec3e76a08e933b8481b6c0b7f8c6a7e51a7 /arch/arc
parentfedf5b9bafca5cd8af99993d1b9cfd13c1dc2c5b (diff)
ARC: [mm] Assume pagecache page dirty by default
Similar to ARM/SH Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc')
-rw-r--r--arch/arc/include/asm/cacheflush.h7
-rw-r--r--arch/arc/mm/cache_arc700.c12
-rw-r--r--arch/arc/mm/tlb.c2
3 files changed, 14 insertions, 7 deletions
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h
index 185dfd03dcdb..6abc4972bc93 100644
--- a/arch/arc/include/asm/cacheflush.h
+++ b/arch/arc/include/asm/cacheflush.h
@@ -81,6 +81,13 @@ void flush_anon_page(struct vm_area_struct *vma,
81#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */ 81#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */
82 82
83/* 83/*
84 * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
85 * This works around some PIO based drivers which don't call flush_dcache_page
86 * to record that they dirtied the dcache
87 */
88#define PG_dc_clean PG_arch_1
89
90/*
84 * Simple wrapper over config option 91 * Simple wrapper over config option
85 * Bootup code ensures that hardware matches kernel configuration 92 * Bootup code ensures that hardware matches kernel configuration
86 */ 93 */
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 074658704d86..66c75ee16e50 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -512,7 +512,7 @@ void flush_dcache_page(struct page *page)
512 struct address_space *mapping; 512 struct address_space *mapping;
513 513
514 if (!cache_is_vipt_aliasing()) { 514 if (!cache_is_vipt_aliasing()) {
515 set_bit(PG_arch_1, &page->flags); 515 clear_bit(PG_dc_clean, &page->flags);
516 return; 516 return;
517 } 517 }
518 518
@@ -526,7 +526,7 @@ void flush_dcache_page(struct page *page)
526 * Make a note that K-mapping is dirty 526 * Make a note that K-mapping is dirty
527 */ 527 */
528 if (!mapping_mapped(mapping)) { 528 if (!mapping_mapped(mapping)) {
529 set_bit(PG_arch_1, &page->flags); 529 clear_bit(PG_dc_clean, &page->flags);
530 } else if (page_mapped(page)) { 530 } else if (page_mapped(page)) {
531 531
532 /* kernel reading from page with U-mapping */ 532 /* kernel reading from page with U-mapping */
@@ -734,7 +734,7 @@ void copy_user_highpage(struct page *to, struct page *from,
734 * non copied user pages (e.g. read faults which wire in pagecache page 734 * non copied user pages (e.g. read faults which wire in pagecache page
735 * directly). 735 * directly).
736 */ 736 */
737 set_bit(PG_arch_1, &to->flags); 737 clear_bit(PG_dc_clean, &to->flags);
738 738
739 /* 739 /*
740 * if SRC was already usermapped and non-congruent to kernel mapping 740 * if SRC was already usermapped and non-congruent to kernel mapping
@@ -742,16 +742,16 @@ void copy_user_highpage(struct page *to, struct page *from,
742 */ 742 */
743 if (clean_src_k_mappings) { 743 if (clean_src_k_mappings) {
744 __flush_dcache_page(kfrom, kfrom); 744 __flush_dcache_page(kfrom, kfrom);
745 clear_bit(PG_arch_1, &from->flags); 745 set_bit(PG_dc_clean, &from->flags);
746 } else { 746 } else {
747 set_bit(PG_arch_1, &from->flags); 747 clear_bit(PG_dc_clean, &from->flags);
748 } 748 }
749} 749}
750 750
751void clear_user_page(void *to, unsigned long u_vaddr, struct page *page) 751void clear_user_page(void *to, unsigned long u_vaddr, struct page *page)
752{ 752{
753 clear_page(to); 753 clear_page(to);
754 set_bit(PG_arch_1, &page->flags); 754 clear_bit(PG_dc_clean, &page->flags);
755} 755}
756 756
757 757
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 1c91dbc8ddd8..d44ae33c2d1e 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -453,7 +453,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,
453 if ((vma->vm_flags & VM_EXEC) || 453 if ((vma->vm_flags & VM_EXEC) ||
454 addr_not_cache_congruent(paddr, vaddr)) { 454 addr_not_cache_congruent(paddr, vaddr)) {
455 455
456 int dirty = test_and_clear_bit(PG_arch_1, &page->flags); 456 int dirty = !test_and_set_bit(PG_dc_clean, &page->flags);
457 if (dirty) { 457 if (dirty) {
458 /* wback + inv dcache lines */ 458 /* wback + inv dcache lines */
459 __flush_dcache_page(paddr, paddr); 459 __flush_dcache_page(paddr, paddr);