diff options
author | Vineet Gupta <vgupta@synopsys.com> | 2013-01-18 04:42:25 -0500 |
---|---|---|
committer | Vineet Gupta <vgupta@synopsys.com> | 2013-02-15 12:46:10 -0500 |
commit | 8b5850f8ac8d9b809db4588b80b568faca5aaaaf (patch) | |
tree | 9cb026d610787ba2177e3543d44c7f94fdfd6bfe /arch/arc/mm | |
parent | 9c57564e26c5392ac7f0e08cc0ad8d29e225a3a3 (diff) |
ARC: Support for single cycle Close Coupled Mem (CCM)
* Includes mapping of CCMs in address space
* Annotations to move arbitrary code/data into CCM
* Moving some of the critical code/data into CCM
* Runtime detection/reporting
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm')
-rw-r--r-- | arch/arc/mm/tlbex.S | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S index 4b1ad2d905ca..9df765dc7c3a 100644 --- a/arch/arc/mm/tlbex.S +++ b/arch/arc/mm/tlbex.S | |||
@@ -53,8 +53,7 @@ | |||
53 | ; For details refer to comments before TLBMISS_FREEUP_REGS below | 53 | ; For details refer to comments before TLBMISS_FREEUP_REGS below |
54 | ;-------------------------------------------------------------------------- | 54 | ;-------------------------------------------------------------------------- |
55 | 55 | ||
56 | .section .data | 56 | ARCFP_DATA ex_saved_reg1 |
57 | .global ex_saved_reg1 | ||
58 | .align 1 << L1_CACHE_SHIFT ; IMP: Must be Cache Line aligned | 57 | .align 1 << L1_CACHE_SHIFT ; IMP: Must be Cache Line aligned |
59 | .type ex_saved_reg1, @object | 58 | .type ex_saved_reg1, @object |
60 | #ifdef CONFIG_SMP | 59 | #ifdef CONFIG_SMP |
@@ -255,7 +254,7 @@ ex_saved_reg1: | |||
255 | #endif | 254 | #endif |
256 | .endm | 255 | .endm |
257 | 256 | ||
258 | .section .text, "ax",@progbits ;Fast Path Code, candidate for ICCM | 257 | ARCFP_CODE ;Fast Path Code, candidate for ICCM |
259 | 258 | ||
260 | ;----------------------------------------------------------------------------- | 259 | ;----------------------------------------------------------------------------- |
261 | ; I-TLB Miss Exception Handler | 260 | ; I-TLB Miss Exception Handler |