ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth values

pt_regs->event was set with artificial values to identify the low level
system event (syscall trap / breakpoint trap / exceptions / interrupts)

With r8 saving out of the way, the full word can be used to save real
ECR (Exception Cause Register) which helps idenify the event naturally,
including additional info such as cause code, param.
Only for Interrupts, where ECR is not applicable, do we resort to
synthetic non ECR values.

SAVE_ALL_TRAP/EXCEPTIONS can now be merged as they both use ECR with
different runtime values.

The ptrace helpers now use the sub-fields of ECR to distinguish the
events (e.g. vector 0x25 is trap, param 0 is syscall...)

The following benefits will follow:

(1) This centralizes the location of where ECR is saved and will allow
    the cleanup of task->thread.cause_code ECR placeholder which is set
    in non-uniform way. Then ARC VM code can safely rely on it being
    there for purpose of finer grained VM_EXEC dcache flush (based on
    exec fault: I-TLB Miss)

(2) Further, ECR being passed around from low level handlers as arg can
    be eliminated as it is part of standard reg-file in pt_regs

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

3 files changed, 33 insertions, 38 deletions

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 122e9af46824..355cb470c2a4 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -60,6 +60,7 @@
 #define ECR_V_ITLB_MISS                 0x21
 #define ECR_V_DTLB_MISS                 0x22
 #define ECR_V_PROTV                     0x23
+#define ECR_V_TRAP                      0x25
 
 /* Protection Violation Exception Cause Code Values */
 #define ECR_C_PROTV_INST_FETCH          0x00
@@ -77,6 +78,9 @@
 #define ECR_C_BIT_DTLB_LD_MISS          8
 #define ECR_C_BIT_DTLB_ST_MISS          9
 
+/* Dummy ECR values for Interrupts */
+#define event_IRQ1              0x0031abcd
+#define event_IRQ2              0x0032abcd
 
 /* Auxiliary registers */
 #define AUX_IDENTITY            4
diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h
index de01bc842a9a..8943c028d4bb 100644
--- a/arch/arc/include/asm/entry.h
+++ b/arch/arc/include/asm/entry.h
@@ -309,7 +309,7 @@
 #endif
 
         /* Save Pre Intr/Exception User SP on kernel stack */
-        st.a    sp, [r9, -16]   ; Make room for orig_r0, orig_r8, user_r25
+        st.a    sp, [r9, -16]   ; Make room for orig_r0, ECR, user_r25
 
         /* CAUTION:
          * SP should be set at the very end when we are done with everything
@@ -391,9 +391,10 @@
  * Note that syscalls are implemented via TRAP which is also a exception
  * from CPU's point of view
  *-------------------------------------------------------------*/
-.macro SAVE_ALL_EXCEPTION   marker
+.macro SAVE_ALL_SYS
 
-        st      \marker, [sp, 8]        /* orig_r8 */
+        lr      r9, [ecr]
+        st      r9, [sp, 8]    /* ECR */
         st      r0, [sp, 4]    /* orig_r0, needed only for sys calls */
 
         /* Restore r9 used to code the early prologue */
@@ -412,20 +413,6 @@
 .endm
 
 /*--------------------------------------------------------------
- * Save scratch regs for exceptions
- *-------------------------------------------------------------*/
-.macro SAVE_ALL_SYS
-        SAVE_ALL_EXCEPTION  orig_r8_IS_EXCPN
-.endm
-
-/*--------------------------------------------------------------
- * Save scratch regs for sys calls
- *-------------------------------------------------------------*/
-.macro SAVE_ALL_TRAP
-        SAVE_ALL_EXCEPTION  orig_r8_IS_SCALL
-.endm
-
-/*--------------------------------------------------------------
  * Restore all registers used by system call or Exceptions
  * SP should always be pointing to the next free stack element
  * when entering this macro.
@@ -452,7 +439,7 @@
         RESTORE_R12_TO_R0
 
         ld  sp, [sp] /* restore original sp */
-        /* orig_r0, orig_r8, user_r25 skipped automatically */
+        /* orig_r0, ECR, user_r25 skipped automatically */
 .endm
 
 
@@ -469,7 +456,7 @@
 #endif
 
         /* now we are ready to save the remaining context :) */
-        st      orig_r8_IS_IRQ1, [sp, 8]    /* Event Type */
+        st      event_IRQ1, [sp, 8]    /* Dummy ECR */
         st      0, [sp, 4]    /* orig_r0 , N/A for IRQ */
 
         SAVE_R0_TO_R12
@@ -494,7 +481,7 @@
         ld  r9, [@int2_saved_reg]
 
         /* now we are ready to save the remaining context :) */
-        st      orig_r8_IS_IRQ2, [sp, 8]    /* Event Type */
+        st      event_IRQ2, [sp, 8]    /* Dummy ECR */
         st      0, [sp, 4]    /* orig_r0 , N/A for IRQ */
 
         SAVE_R0_TO_R12
@@ -535,7 +522,7 @@
         RESTORE_R12_TO_R0
 
         ld  sp, [sp] /* restore original sp */
-        /* orig_r0, orig_r8, user_r25 skipped automatically */
+        /* orig_r0, ECR, user_r25 skipped automatically */
 .endm
 
 .macro RESTORE_ALL_INT2
@@ -554,7 +541,7 @@
         RESTORE_R12_TO_R0
 
         ld  sp, [sp] /* restore original sp */
-        /* orig_r0, orig_r8, user_r25 skipped automatically */
+        /* orig_r0, ECR, user_r25 skipped automatically */
 .endm
 
 
diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h
index 7b2de6f7025a..c9938e7a7dbd 100644
--- a/arch/arc/include/asm/ptrace.h
+++ b/arch/arc/include/asm/ptrace.h
@@ -44,15 +44,24 @@ struct pt_regs {
         long sp;        /* user/kernel sp depending on where we came from  */
         long orig_r0;
 
-        /*to distinguish bet excp, syscall, irq */
+        /*
+         * To distinguish bet excp, syscall, irq
+         * For traps and exceptions, Exception Cause Register.
+         *      ECR: <00> <VV> <CC> <PP>
+         *      Last word used by Linux for extra state mgmt (syscall-restart)
+         * For interrupts, use artificial ECR values to note current prio-level
+         */
         union {
+                struct {
 #ifdef CONFIG_CPU_BIG_ENDIAN
-                /* so that assembly code is same for LE/BE */
-                unsigned long orig_r8:16, event:16;
+                        unsigned long state:8, ecr_vec:8,
+                                      ecr_cause:8, ecr_param:8;
 #else
-                unsigned long event:16, orig_r8:16;
+                        unsigned long ecr_param:8, ecr_cause:8,
+                                      ecr_vec:8, state:8;
 #endif
-                long orig_r8_word;
+                };
+                unsigned long event;
         };
 
         long user_r25;
@@ -94,11 +103,13 @@ struct callee_regs {
 /* return 1 if PC in delay slot */
 #define delay_mode(regs) ((regs->status32 & STATUS_DE_MASK) == STATUS_DE_MASK)
 
-#define in_syscall(regs)    (regs->event & orig_r8_IS_SCALL)
-#define in_brkpt_trap(regs) (regs->event & orig_r8_IS_BRKPT)
+#define in_syscall(regs)    ((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param)
+#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param)
 
-#define syscall_wont_restart(regs) (regs->event |= orig_r8_IS_SCALL_RESTARTED)
-#define syscall_restartable(regs) !(regs->event &  orig_r8_IS_SCALL_RESTARTED)
+#define STATE_SCALL_RESTARTED   0x01
+
+#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED)
+#define syscall_restartable(reg) !(reg->state &  STATE_SCALL_RESTARTED)
 
 #define current_pt_regs()                                       \
 ({                                                              \
@@ -115,11 +126,4 @@ static inline long regs_return_value(struct pt_regs *regs)
 
 #endif /* !__ASSEMBLY__ */
 
-#define orig_r8_IS_SCALL                0x0001
-#define orig_r8_IS_SCALL_RESTARTED      0x0002
-#define orig_r8_IS_BRKPT                0x0004
-#define orig_r8_IS_EXCPN                0x0008
-#define orig_r8_IS_IRQ1                 0x0010
-#define orig_r8_IS_IRQ2                 0x0020
-
 #endif /* __ASM_PTRACE_H */