aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arc/include
diff options
context:
space:
mode:
authorVineet Gupta <vgupta@synopsys.com>2013-06-17 10:14:06 -0400
committerVineet Gupta <vgupta@synopsys.com>2013-08-30 00:49:12 -0400
commitd091fcb97ff48a5cb6de19ad0881fb2c8e76dbc0 (patch)
treec54e1ce880e399ed6a72c054f6cf244bc3752071 /arch/arc/include
parent64b703ef276964b160a5e88df0764f254460cafb (diff)
ARC: MMUv4 preps/2 - Reshuffle PTE bits
With previous commit freeing up PTE bits, reassign them so as to: - Match the bit to H/w counterpart where possible (e.g. MMUv2 GLOBAL/PRESENT, this avoids a shift in create_tlb()) - Avoid holes in _PAGE_xxx definitions Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include')
-rw-r--r--arch/arc/include/asm/pgtable.h22
1 files changed, 8 insertions, 14 deletions
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index 99799c91ca00..6b0b7f7ef783 100644
--- a/arch/arc/include/asm/pgtable.h
+++ b/arch/arc/include/asm/pgtable.h
@@ -60,30 +60,24 @@
60#define _PAGE_EXECUTE (1<<3) /* Page has user execute perm (H) */ 60#define _PAGE_EXECUTE (1<<3) /* Page has user execute perm (H) */
61#define _PAGE_WRITE (1<<4) /* Page has user write perm (H) */ 61#define _PAGE_WRITE (1<<4) /* Page has user write perm (H) */
62#define _PAGE_READ (1<<5) /* Page has user read perm (H) */ 62#define _PAGE_READ (1<<5) /* Page has user read perm (H) */
63#define _PAGE_GLOBAL (1<<9) /* Page is global (H) */ 63#define _PAGE_MODIFIED (1<<6) /* Page modified (dirty) (S) */
64#define _PAGE_MODIFIED (1<<10) /* Page modified (dirty) (S) */ 64#define _PAGE_FILE (1<<7) /* page cache/ swap (S) */
65#define _PAGE_FILE (1<<10) /* page cache/ swap (S) */ 65#define _PAGE_GLOBAL (1<<8) /* Page is global (H) */
66#define _PAGE_PRESENT (1<<11) /* TLB entry is valid (H) */ 66#define _PAGE_PRESENT (1<<10) /* TLB entry is valid (H) */
67 67
68#else /* MMU v3 onwards */ 68#else /* MMU v3 onwards */
69 69
70/* PD1 */
71#define _PAGE_CACHEABLE (1<<0) /* Page is cached (H) */ 70#define _PAGE_CACHEABLE (1<<0) /* Page is cached (H) */
72#define _PAGE_EXECUTE (1<<1) /* Page has user execute perm (H) */ 71#define _PAGE_EXECUTE (1<<1) /* Page has user execute perm (H) */
73#define _PAGE_WRITE (1<<2) /* Page has user write perm (H) */ 72#define _PAGE_WRITE (1<<2) /* Page has user write perm (H) */
74#define _PAGE_READ (1<<3) /* Page has user read perm (H) */ 73#define _PAGE_READ (1<<3) /* Page has user read perm (H) */
75#define _PAGE_ACCESSED (1<<7) /* Page is accessed (S) */ 74#define _PAGE_ACCESSED (1<<4) /* Page is accessed (S) */
76 75#define _PAGE_MODIFIED (1<<5) /* Page modified (dirty) (S) */
77/* PD0 */ 76#define _PAGE_FILE (1<<6) /* page cache/ swap (S) */
78#define _PAGE_GLOBAL (1<<8) /* Page is global (H) */ 77#define _PAGE_GLOBAL (1<<8) /* Page is global (H) */
79#define _PAGE_PRESENT (1<<9) /* TLB entry is valid (H) */ 78#define _PAGE_PRESENT (1<<9) /* TLB entry is valid (H) */
80#define _PAGE_SHARED_CODE (1<<10) /* Shared Code page with cmn vaddr 79#define _PAGE_SHARED_CODE (1<<11) /* Shared Code page with cmn vaddr
81 usable for shared TLB entries (H) */ 80 usable for shared TLB entries (H) */
82
83#define _PAGE_MODIFIED (1<<11) /* Page modified (dirty) (S) */
84#define _PAGE_FILE (1<<12) /* page cache/ swap (S) */
85
86#define _PAGE_SHARED_CODE_H (1<<31) /* Hardware counterpart of above */
87#endif 81#endif
88 82
89/* vmalloc permissions */ 83/* vmalloc permissions */