ARC: Support for high priority interrupts in the in-core intc

There is a bit of hack/kludge right now where we disable preemption if a
L2 (High prio) IRQ is taken while L1 (Low prio) is active.

Need to revisit this

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

1 files changed, 19 insertions, 0 deletions

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 405ea7a756b8..68350aa3d297 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -208,6 +208,25 @@ config ARC_PAGE_SIZE_4K
 
 endchoice
 
+config ARC_COMPACT_IRQ_LEVELS
+        bool "ARCompact IRQ Priorities: High(2)/Low(1)"
+        default n
+        # Timer HAS to be high priority, for any other high priority config
+        select ARC_IRQ3_LV2
+
+if ARC_COMPACT_IRQ_LEVELS
+
+config ARC_IRQ3_LV2
+        bool
+
+config ARC_IRQ5_LV2
+        bool
+
+config ARC_IRQ6_LV2
+        bool
+
+endif
+
 config ARC_FPU_SAVE_RESTORE
         bool "Enable FPU state persistence across context switch"
         default n