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authorMichal Marek <mmarek@suse.cz>2010-10-12 09:09:06 -0400
committerMichal Marek <mmarek@suse.cz>2010-10-12 09:09:06 -0400
commit239060b93bb30a4ad55f1ecaa512464a035cc5ba (patch)
tree77f79810e57d4fc24356eca0cd6db463e8994128 /arch/alpha
parent1408b15b98635a13bad2e2a50b3c2ae2ccdf625b (diff)
parente9203c988234aa512bd45ca32b52e21c7bbfc414 (diff)
Merge branch 'kbuild/rc-fixes' into kbuild/kconfig
We need to revert the temporary hack in 71ebc01, hence the merge.
Diffstat (limited to 'arch/alpha')
-rw-r--r--arch/alpha/Kconfig4
-rw-r--r--arch/alpha/defconfig884
-rw-r--r--arch/alpha/include/asm/Kbuild11
-rw-r--r--arch/alpha/include/asm/dma-mapping.h2
-rw-r--r--arch/alpha/include/asm/hw_irq.h1
-rw-r--r--arch/alpha/include/asm/ioctls.h4
-rw-r--r--arch/alpha/include/asm/local64.h1
-rw-r--r--arch/alpha/include/asm/md.h13
-rw-r--r--arch/alpha/include/asm/perf_event.h8
-rw-r--r--arch/alpha/include/asm/scatterlist.h2
-rw-r--r--arch/alpha/include/asm/termbits.h1
-rw-r--r--arch/alpha/include/asm/wrperfmon.h93
-rw-r--r--arch/alpha/kernel/Makefile1
-rw-r--r--arch/alpha/kernel/irq.c7
-rw-r--r--arch/alpha/kernel/irq_alpha.c3
-rw-r--r--arch/alpha/kernel/osf_sys.c14
-rw-r--r--arch/alpha/kernel/perf_event.c842
-rw-r--r--arch/alpha/kernel/process.c2
-rw-r--r--arch/alpha/kernel/time.c26
19 files changed, 1012 insertions, 907 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 95808c13b277..f706a88c8436 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -43,10 +43,6 @@ config GENERIC_CALIBRATE_DELAY
43 bool 43 bool
44 default y 44 default y
45 45
46config GENERIC_TIME
47 bool
48 default y
49
50config GENERIC_CMOS_UPDATE 46config GENERIC_CMOS_UPDATE
51 def_bool y 47 def_bool y
52 48
diff --git a/arch/alpha/defconfig b/arch/alpha/defconfig
index e43f68fd66b0..539e8b5a6cbd 100644
--- a/arch/alpha/defconfig
+++ b/arch/alpha/defconfig
@@ -1,926 +1,76 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.9-rc2
4# Sat Sep 25 15:38:35 2004
5#
6CONFIG_ALPHA=y
7CONFIG_64BIT=y
8CONFIG_MMU=y
9CONFIG_RWSEM_XCHGADD_ALGORITHM=y
10CONFIG_GENERIC_ISA_DMA=y
11# CONFIG_GENERIC_IOMAP is not set
12
13#
14# Code maturity level options
15#
16CONFIG_EXPERIMENTAL=y 1CONFIG_EXPERIMENTAL=y
17CONFIG_CLEAN_COMPILE=y
18CONFIG_BROKEN_ON_SMP=y
19
20#
21# General setup
22#
23CONFIG_LOCALVERSION=""
24CONFIG_SWAP=y
25CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
26CONFIG_POSIX_MQUEUE=y 3CONFIG_POSIX_MQUEUE=y
27# CONFIG_BSD_PROCESS_ACCT is not set
28CONFIG_SYSCTL=y
29# CONFIG_AUDIT is not set
30CONFIG_LOG_BUF_SHIFT=14 4CONFIG_LOG_BUF_SHIFT=14
31# CONFIG_HOTPLUG is not set
32# CONFIG_IKCONFIG is not set
33# CONFIG_EMBEDDED is not set
34CONFIG_KALLSYMS=y
35CONFIG_KALLSYMS_ALL=y
36# CONFIG_KALLSYMS_EXTRA_PASS is not set
37CONFIG_FUTEX=y
38CONFIG_EPOLL=y
39CONFIG_IOSCHED_NOOP=y
40CONFIG_IOSCHED_AS=y
41CONFIG_IOSCHED_DEADLINE=y
42CONFIG_IOSCHED_CFQ=y
43# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 5# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
44CONFIG_SHMEM=y 6CONFIG_KALLSYMS_ALL=y
45# CONFIG_TINY_SHMEM is not set
46
47#
48# Loadable module support
49#
50CONFIG_MODULES=y 7CONFIG_MODULES=y
51CONFIG_MODULE_UNLOAD=y 8CONFIG_MODULE_UNLOAD=y
52# CONFIG_MODULE_FORCE_UNLOAD is not set
53CONFIG_OBSOLETE_MODPARM=y
54# CONFIG_MODVERSIONS is not set
55CONFIG_KMOD=y
56
57#
58# System setup
59#
60CONFIG_ALPHA_GENERIC=y
61# CONFIG_ALPHA_ALCOR is not set
62# CONFIG_ALPHA_XL is not set
63# CONFIG_ALPHA_BOOK1 is not set
64# CONFIG_ALPHA_AVANTI_CH is not set
65# CONFIG_ALPHA_CABRIOLET is not set
66# CONFIG_ALPHA_DP264 is not set
67# CONFIG_ALPHA_EB164 is not set
68# CONFIG_ALPHA_EB64P_CH is not set
69# CONFIG_ALPHA_EB66 is not set
70# CONFIG_ALPHA_EB66P is not set
71# CONFIG_ALPHA_EIGER is not set
72# CONFIG_ALPHA_JENSEN is not set
73# CONFIG_ALPHA_LX164 is not set
74# CONFIG_ALPHA_LYNX is not set
75# CONFIG_ALPHA_MARVEL is not set
76# CONFIG_ALPHA_MIATA is not set
77# CONFIG_ALPHA_MIKASA is not set
78# CONFIG_ALPHA_NAUTILUS is not set
79# CONFIG_ALPHA_NONAME_CH is not set
80# CONFIG_ALPHA_NORITAKE is not set
81# CONFIG_ALPHA_PC164 is not set
82# CONFIG_ALPHA_P2K is not set
83# CONFIG_ALPHA_RAWHIDE is not set
84# CONFIG_ALPHA_RUFFIAN is not set
85# CONFIG_ALPHA_RX164 is not set
86# CONFIG_ALPHA_SX164 is not set
87# CONFIG_ALPHA_SABLE is not set
88# CONFIG_ALPHA_SHARK is not set
89# CONFIG_ALPHA_TAKARA is not set
90# CONFIG_ALPHA_TITAN is not set
91# CONFIG_ALPHA_WILDFIRE is not set
92CONFIG_ISA=y
93CONFIG_PCI=y
94CONFIG_PCI_DOMAINS=y
95CONFIG_ALPHA_CORE_AGP=y
96CONFIG_ALPHA_BROKEN_IRQ_MASK=y
97CONFIG_EISA=y
98# CONFIG_SMP is not set
99# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
100CONFIG_VERBOSE_MCHECK=y 9CONFIG_VERBOSE_MCHECK=y
101CONFIG_VERBOSE_MCHECK_ON=1
102CONFIG_PCI_LEGACY_PROC=y
103CONFIG_PCI_NAMES=y
104CONFIG_EISA_PCI_EISA=y
105CONFIG_EISA_VIRTUAL_ROOT=y
106CONFIG_EISA_NAMES=y
107CONFIG_SRM_ENV=m 10CONFIG_SRM_ENV=m
108CONFIG_BINFMT_ELF=y 11CONFIG_NET=y
109# CONFIG_BINFMT_AOUT is not set 12CONFIG_PACKET=y
110# CONFIG_BINFMT_EM86 is not set 13CONFIG_UNIX=y
111# CONFIG_BINFMT_MISC is not set 14CONFIG_XFRM_USER=m
112 15CONFIG_NET_KEY=m
113# 16CONFIG_INET=y
114# Device Drivers 17CONFIG_IP_MULTICAST=y
115# 18CONFIG_INET_AH=m
116 19CONFIG_INET_ESP=m
117# 20# CONFIG_IPV6 is not set
118# Generic Driver Options 21CONFIG_NETFILTER=y
119# 22CONFIG_IP_NF_QUEUE=m
120CONFIG_STANDALONE=y 23CONFIG_IP_NF_IPTABLES=m
121CONFIG_PREVENT_FIRMWARE_BUILD=y 24CONFIG_IP_NF_FILTER=m
122# CONFIG_DEBUG_DRIVER is not set 25CONFIG_VLAN_8021Q=m
123
124#
125# Memory Technology Devices (MTD)
126#
127# CONFIG_MTD is not set
128
129#
130# Parallel port support
131#
132# CONFIG_PARPORT is not set
133
134#
135# Plug and Play support
136#
137CONFIG_PNP=y 26CONFIG_PNP=y
138# CONFIG_PNP_DEBUG is not set
139
140#
141# Protocols
142#
143CONFIG_ISAPNP=y 27CONFIG_ISAPNP=y
144
145#
146# Block devices
147#
148CONFIG_BLK_DEV_FD=y 28CONFIG_BLK_DEV_FD=y
149# CONFIG_BLK_DEV_XD is not set
150# CONFIG_BLK_CPQ_DA is not set
151# CONFIG_BLK_CPQ_CISS_DA is not set
152# CONFIG_BLK_DEV_DAC960 is not set
153# CONFIG_BLK_DEV_UMEM is not set
154CONFIG_BLK_DEV_LOOP=m 29CONFIG_BLK_DEV_LOOP=m
155# CONFIG_BLK_DEV_CRYPTOLOOP is not set
156# CONFIG_BLK_DEV_NBD is not set
157# CONFIG_BLK_DEV_SX8 is not set
158# CONFIG_BLK_DEV_RAM is not set
159
160#
161# ATA/ATAPI/MFM/RLL support
162#
163CONFIG_IDE=y 30CONFIG_IDE=y
164CONFIG_IDE_MAX_HWIFS=4
165CONFIG_BLK_DEV_IDE=y
166
167#
168# Please see Documentation/ide.txt for help/info on IDE drives
169#
170# CONFIG_BLK_DEV_IDE_SATA is not set
171CONFIG_BLK_DEV_IDEDISK=y
172CONFIG_IDEDISK_MULTI_MODE=y
173CONFIG_BLK_DEV_IDECD=y 31CONFIG_BLK_DEV_IDECD=y
174# CONFIG_BLK_DEV_IDETAPE is not set
175# CONFIG_BLK_DEV_IDEFLOPPY is not set
176# CONFIG_BLK_DEV_IDESCSI is not set
177# CONFIG_IDE_TASK_IOCTL is not set
178# CONFIG_IDE_TASKFILE_IO is not set
179
180#
181# IDE chipset support/bugfixes
182#
183CONFIG_IDE_GENERIC=y 32CONFIG_IDE_GENERIC=y
184# CONFIG_BLK_DEV_IDEPNP is not set
185CONFIG_BLK_DEV_IDEPCI=y
186# CONFIG_IDEPCI_SHARE_IRQ is not set
187# CONFIG_BLK_DEV_OFFBOARD is not set
188CONFIG_BLK_DEV_GENERIC=y 33CONFIG_BLK_DEV_GENERIC=y
189# CONFIG_BLK_DEV_OPTI621 is not set
190CONFIG_BLK_DEV_IDEDMA_PCI=y
191# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
192CONFIG_IDEDMA_PCI_AUTO=y
193# CONFIG_IDEDMA_ONLYDISK is not set
194# CONFIG_BLK_DEV_AEC62XX is not set
195CONFIG_BLK_DEV_ALI15X3=y 34CONFIG_BLK_DEV_ALI15X3=y
196# CONFIG_WDC_ALI15X3 is not set
197# CONFIG_BLK_DEV_AMD74XX is not set
198CONFIG_BLK_DEV_CMD64X=y 35CONFIG_BLK_DEV_CMD64X=y
199# CONFIG_BLK_DEV_TRIFLEX is not set
200CONFIG_BLK_DEV_CY82C693=y 36CONFIG_BLK_DEV_CY82C693=y
201# CONFIG_BLK_DEV_CS5520 is not set
202# CONFIG_BLK_DEV_CS5530 is not set
203# CONFIG_BLK_DEV_HPT34X is not set
204# CONFIG_BLK_DEV_HPT366 is not set
205# CONFIG_BLK_DEV_SC1200 is not set
206# CONFIG_BLK_DEV_PIIX is not set
207# CONFIG_BLK_DEV_NS87415 is not set
208# CONFIG_BLK_DEV_PDC202XX_OLD is not set
209# CONFIG_BLK_DEV_PDC202XX_NEW is not set
210# CONFIG_BLK_DEV_SVWKS is not set
211# CONFIG_BLK_DEV_SIIMAGE is not set
212# CONFIG_BLK_DEV_SLC90E66 is not set
213# CONFIG_BLK_DEV_TRM290 is not set
214# CONFIG_BLK_DEV_VIA82CXXX is not set
215# CONFIG_IDE_ARM is not set
216# CONFIG_IDE_CHIPSETS is not set
217CONFIG_BLK_DEV_IDEDMA=y
218# CONFIG_IDEDMA_IVB is not set
219CONFIG_IDEDMA_AUTO=y
220# CONFIG_BLK_DEV_HD is not set
221
222#
223# SCSI device support
224#
225CONFIG_SCSI=y 37CONFIG_SCSI=y
226CONFIG_SCSI_PROC_FS=y
227
228#
229# SCSI support type (disk, tape, CD-ROM)
230#
231CONFIG_BLK_DEV_SD=y 38CONFIG_BLK_DEV_SD=y
232# CONFIG_CHR_DEV_ST is not set
233# CONFIG_CHR_DEV_OSST is not set
234CONFIG_BLK_DEV_SR=y 39CONFIG_BLK_DEV_SR=y
235CONFIG_BLK_DEV_SR_VENDOR=y 40CONFIG_BLK_DEV_SR_VENDOR=y
236# CONFIG_CHR_DEV_SG is not set
237
238#
239# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
240#
241# CONFIG_SCSI_MULTI_LUN is not set
242# CONFIG_SCSI_CONSTANTS is not set
243# CONFIG_SCSI_LOGGING is not set
244
245#
246# SCSI Transport Attributes
247#
248# CONFIG_SCSI_SPI_ATTRS is not set
249# CONFIG_SCSI_FC_ATTRS is not set
250
251#
252# SCSI low-level drivers
253#
254# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
255# CONFIG_SCSI_3W_9XXX is not set
256# CONFIG_SCSI_7000FASST is not set
257# CONFIG_SCSI_ACARD is not set
258# CONFIG_SCSI_AHA1542 is not set
259# CONFIG_SCSI_AHA1740 is not set
260# CONFIG_SCSI_AACRAID is not set
261CONFIG_SCSI_AIC7XXX=m 41CONFIG_SCSI_AIC7XXX=m
262CONFIG_AIC7XXX_CMDS_PER_DEVICE=253 42CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
263CONFIG_AIC7XXX_RESET_DELAY_MS=5000
264# CONFIG_AIC7XXX_PROBE_EISA_VL is not set
265# CONFIG_AIC7XXX_DEBUG_ENABLE is not set 43# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
266CONFIG_AIC7XXX_DEBUG_MASK=0
267CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
268# CONFIG_SCSI_AIC7XXX_OLD is not set
269# CONFIG_SCSI_AIC79XX is not set
270# CONFIG_SCSI_IN2000 is not set
271# CONFIG_MEGARAID_NEWGEN is not set
272# CONFIG_MEGARAID_LEGACY is not set
273# CONFIG_SCSI_SATA is not set
274# CONFIG_SCSI_BUSLOGIC is not set
275# CONFIG_SCSI_DMX3191D is not set
276# CONFIG_SCSI_DTC3280 is not set
277# CONFIG_SCSI_EATA is not set
278# CONFIG_SCSI_EATA_PIO is not set
279# CONFIG_SCSI_FUTURE_DOMAIN is not set
280# CONFIG_SCSI_GDTH is not set
281# CONFIG_SCSI_GENERIC_NCR5380 is not set
282# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
283# CONFIG_SCSI_IPS is not set
284# CONFIG_SCSI_INIA100 is not set
285# CONFIG_SCSI_NCR53C406A is not set
286# CONFIG_SCSI_SYM53C8XX_2 is not set
287# CONFIG_SCSI_IPR is not set
288# CONFIG_SCSI_PAS16 is not set
289# CONFIG_SCSI_PSI240I is not set
290# CONFIG_SCSI_QLOGIC_FAS is not set
291# CONFIG_SCSI_QLOGIC_ISP is not set
292# CONFIG_SCSI_QLOGIC_FC is not set
293# CONFIG_SCSI_QLOGIC_1280 is not set
294CONFIG_SCSI_QLA2XXX=y
295# CONFIG_SCSI_QLA21XX is not set
296# CONFIG_SCSI_QLA22XX is not set
297# CONFIG_SCSI_QLA2300 is not set
298# CONFIG_SCSI_QLA2322 is not set
299# CONFIG_SCSI_QLA6312 is not set
300# CONFIG_SCSI_QLA6322 is not set
301# CONFIG_SCSI_SIM710 is not set
302# CONFIG_SCSI_SYM53C416 is not set
303# CONFIG_SCSI_DC395x is not set
304# CONFIG_SCSI_DC390T is not set
305# CONFIG_SCSI_T128 is not set
306# CONFIG_SCSI_U14_34F is not set
307# CONFIG_SCSI_DEBUG is not set
308
309#
310# Old CD-ROM drivers (not SCSI, not IDE)
311#
312# CONFIG_CD_NO_IDESCSI is not set
313
314#
315# Multi-device support (RAID and LVM)
316#
317# CONFIG_MD is not set
318
319#
320# Fusion MPT device support
321#
322# CONFIG_FUSION is not set
323
324#
325# IEEE 1394 (FireWire) support
326#
327# CONFIG_IEEE1394 is not set
328
329#
330# I2O device support
331#
332# CONFIG_I2O is not set
333
334#
335# Networking support
336#
337CONFIG_NET=y
338
339#
340# Networking options
341#
342CONFIG_PACKET=y
343# CONFIG_PACKET_MMAP is not set
344CONFIG_NETLINK_DEV=y
345CONFIG_UNIX=y
346CONFIG_NET_KEY=m
347CONFIG_INET=y
348CONFIG_IP_MULTICAST=y
349# CONFIG_IP_ADVANCED_ROUTER is not set
350# CONFIG_IP_PNP is not set
351# CONFIG_NET_IPIP is not set
352# CONFIG_NET_IPGRE is not set
353# CONFIG_IP_MROUTE is not set
354# CONFIG_ARPD is not set
355# CONFIG_SYN_COOKIES is not set
356CONFIG_INET_AH=m
357CONFIG_INET_ESP=m
358# CONFIG_INET_IPCOMP is not set
359# CONFIG_INET_TUNNEL is not set
360
361#
362# IP: Virtual Server Configuration
363#
364# CONFIG_IP_VS is not set
365# CONFIG_IPV6 is not set
366CONFIG_NETFILTER=y
367# CONFIG_NETFILTER_DEBUG is not set
368
369#
370# IP: Netfilter Configuration
371#
372CONFIG_IP_NF_CONNTRACK=m
373# CONFIG_IP_NF_CT_ACCT is not set
374# CONFIG_IP_NF_CT_PROTO_SCTP is not set
375CONFIG_IP_NF_FTP=m
376CONFIG_IP_NF_IRC=m
377# CONFIG_IP_NF_TFTP is not set
378# CONFIG_IP_NF_AMANDA is not set
379CONFIG_IP_NF_QUEUE=m
380CONFIG_IP_NF_IPTABLES=m
381# CONFIG_IP_NF_MATCH_LIMIT is not set
382# CONFIG_IP_NF_MATCH_IPRANGE is not set
383# CONFIG_IP_NF_MATCH_MAC is not set
384# CONFIG_IP_NF_MATCH_PKTTYPE is not set
385# CONFIG_IP_NF_MATCH_MARK is not set
386# CONFIG_IP_NF_MATCH_MULTIPORT is not set
387# CONFIG_IP_NF_MATCH_TOS is not set
388# CONFIG_IP_NF_MATCH_RECENT is not set
389# CONFIG_IP_NF_MATCH_ECN is not set
390# CONFIG_IP_NF_MATCH_DSCP is not set
391# CONFIG_IP_NF_MATCH_AH_ESP is not set
392# CONFIG_IP_NF_MATCH_LENGTH is not set
393# CONFIG_IP_NF_MATCH_TTL is not set
394# CONFIG_IP_NF_MATCH_TCPMSS is not set
395# CONFIG_IP_NF_MATCH_HELPER is not set
396# CONFIG_IP_NF_MATCH_STATE is not set
397# CONFIG_IP_NF_MATCH_CONNTRACK is not set
398# CONFIG_IP_NF_MATCH_OWNER is not set
399# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
400# CONFIG_IP_NF_MATCH_REALM is not set
401# CONFIG_IP_NF_MATCH_SCTP is not set
402# CONFIG_IP_NF_MATCH_COMMENT is not set
403CONFIG_IP_NF_FILTER=m
404# CONFIG_IP_NF_TARGET_REJECT is not set
405# CONFIG_IP_NF_TARGET_LOG is not set
406# CONFIG_IP_NF_TARGET_ULOG is not set
407# CONFIG_IP_NF_TARGET_TCPMSS is not set
408CONFIG_IP_NF_NAT=m
409CONFIG_IP_NF_NAT_NEEDED=y
410CONFIG_IP_NF_TARGET_MASQUERADE=m
411# CONFIG_IP_NF_TARGET_REDIRECT is not set
412# CONFIG_IP_NF_TARGET_NETMAP is not set
413# CONFIG_IP_NF_TARGET_SAME is not set
414# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
415CONFIG_IP_NF_NAT_IRC=m
416CONFIG_IP_NF_NAT_FTP=m
417# CONFIG_IP_NF_MANGLE is not set
418# CONFIG_IP_NF_RAW is not set
419# CONFIG_IP_NF_ARPTABLES is not set
420CONFIG_IP_NF_COMPAT_IPCHAINS=y
421CONFIG_XFRM=y
422CONFIG_XFRM_USER=m
423
424#
425# SCTP Configuration (EXPERIMENTAL)
426#
427# CONFIG_IP_SCTP is not set
428# CONFIG_ATM is not set
429# CONFIG_BRIDGE is not set
430CONFIG_VLAN_8021Q=m
431# CONFIG_DECNET is not set
432# CONFIG_LLC2 is not set
433# CONFIG_IPX is not set
434# CONFIG_ATALK is not set
435# CONFIG_X25 is not set
436# CONFIG_LAPB is not set
437# CONFIG_NET_DIVERT is not set
438# CONFIG_ECONET is not set
439# CONFIG_WAN_ROUTER is not set
440# CONFIG_NET_HW_FLOWCONTROL is not set
441
442#
443# QoS and/or fair queueing
444#
445# CONFIG_NET_SCHED is not set
446# CONFIG_NET_CLS_ROUTE is not set
447
448#
449# Network testing
450#
451# CONFIG_NET_PKTGEN is not set
452# CONFIG_NETPOLL is not set
453# CONFIG_NET_POLL_CONTROLLER is not set
454# CONFIG_HAMRADIO is not set
455# CONFIG_IRDA is not set
456# CONFIG_BT is not set
457CONFIG_NETDEVICES=y 44CONFIG_NETDEVICES=y
458CONFIG_DUMMY=m 45CONFIG_DUMMY=m
459# CONFIG_BONDING is not set
460# CONFIG_EQUALIZER is not set
461# CONFIG_TUN is not set
462# CONFIG_ETHERTAP is not set
463# CONFIG_NET_SB1000 is not set
464
465#
466# ARCnet devices
467#
468# CONFIG_ARCNET is not set
469
470#
471# Ethernet (10 or 100Mbit)
472#
473CONFIG_NET_ETHERNET=y 46CONFIG_NET_ETHERNET=y
474CONFIG_MII=y
475# CONFIG_HAPPYMEAL is not set
476# CONFIG_SUNGEM is not set
477CONFIG_NET_VENDOR_3COM=y 47CONFIG_NET_VENDOR_3COM=y
478# CONFIG_EL1 is not set
479# CONFIG_EL2 is not set
480# CONFIG_ELPLUS is not set
481# CONFIG_EL16 is not set
482# CONFIG_EL3 is not set
483# CONFIG_3C515 is not set
484CONFIG_VORTEX=y 48CONFIG_VORTEX=y
485# CONFIG_TYPHOON is not set
486# CONFIG_LANCE is not set
487# CONFIG_NET_VENDOR_SMC is not set
488# CONFIG_NET_VENDOR_RACAL is not set
489
490#
491# Tulip family network device support
492#
493CONFIG_NET_TULIP=y 49CONFIG_NET_TULIP=y
494CONFIG_DE2104X=m 50CONFIG_DE2104X=m
495CONFIG_TULIP=y 51CONFIG_TULIP=y
496# CONFIG_TULIP_MWI is not set
497CONFIG_TULIP_MMIO=y 52CONFIG_TULIP_MMIO=y
498# CONFIG_TULIP_NAPI is not set
499# CONFIG_DE4X5 is not set
500# CONFIG_WINBOND_840 is not set
501# CONFIG_DM9102 is not set
502# CONFIG_AT1700 is not set
503# CONFIG_DEPCA is not set
504# CONFIG_HP100 is not set
505# CONFIG_NET_ISA is not set
506CONFIG_NET_PCI=y 53CONFIG_NET_PCI=y
507# CONFIG_PCNET32 is not set
508# CONFIG_AMD8111_ETH is not set
509# CONFIG_ADAPTEC_STARFIRE is not set
510# CONFIG_AC3200 is not set
511# CONFIG_APRICOT is not set
512# CONFIG_B44 is not set
513# CONFIG_FORCEDETH is not set
514# CONFIG_CS89x0 is not set
515# CONFIG_DGRS is not set
516# CONFIG_EEPRO100 is not set
517# CONFIG_E100 is not set
518# CONFIG_LNE390 is not set
519# CONFIG_FEALNX is not set
520# CONFIG_NATSEMI is not set
521# CONFIG_NE2K_PCI is not set
522# CONFIG_NE3210 is not set
523# CONFIG_ES3210 is not set
524# CONFIG_8139CP is not set
525# CONFIG_8139TOO is not set
526# CONFIG_SIS900 is not set
527# CONFIG_EPIC100 is not set
528# CONFIG_SUNDANCE is not set
529# CONFIG_VIA_RHINE is not set
530# CONFIG_VIA_VELOCITY is not set
531# CONFIG_NET_POCKET is not set
532
533#
534# Ethernet (1000 Mbit)
535#
536# CONFIG_ACENIC is not set
537# CONFIG_DL2K is not set
538# CONFIG_E1000 is not set
539# CONFIG_NS83820 is not set
540# CONFIG_HAMACHI is not set
541CONFIG_YELLOWFIN=y 54CONFIG_YELLOWFIN=y
542# CONFIG_R8169 is not set
543# CONFIG_SK98LIN is not set
544# CONFIG_TIGON3 is not set
545
546#
547# Ethernet (10000 Mbit)
548#
549# CONFIG_IXGB is not set
550# CONFIG_S2IO is not set
551
552#
553# Token Ring devices
554#
555# CONFIG_TR is not set
556
557#
558# Wireless LAN (non-hamradio)
559#
560# CONFIG_NET_RADIO is not set
561
562#
563# Wan interfaces
564#
565# CONFIG_WAN is not set
566# CONFIG_FDDI is not set
567# CONFIG_HIPPI is not set
568# CONFIG_PPP is not set
569# CONFIG_SLIP is not set
570# CONFIG_NET_FC is not set
571# CONFIG_SHAPER is not set
572# CONFIG_NETCONSOLE is not set
573
574#
575# ISDN subsystem
576#
577# CONFIG_ISDN is not set
578
579#
580# Telephony Support
581#
582# CONFIG_PHONE is not set
583
584#
585# Input device support
586#
587CONFIG_INPUT=y
588
589#
590# Userland interfaces
591#
592CONFIG_INPUT_MOUSEDEV=y
593CONFIG_INPUT_MOUSEDEV_PSAUX=y
594CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
595CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
596# CONFIG_INPUT_JOYDEV is not set
597# CONFIG_INPUT_TSDEV is not set
598# CONFIG_INPUT_EVDEV is not set
599# CONFIG_INPUT_EVBUG is not set
600
601#
602# Input I/O drivers
603#
604# CONFIG_GAMEPORT is not set
605CONFIG_SOUND_GAMEPORT=y
606CONFIG_SERIO=y
607CONFIG_SERIO_I8042=y
608CONFIG_SERIO_SERPORT=y
609# CONFIG_SERIO_CT82C710 is not set
610# CONFIG_SERIO_PCIPS2 is not set
611# CONFIG_SERIO_RAW is not set
612
613#
614# Input Device Drivers
615#
616CONFIG_INPUT_KEYBOARD=y
617CONFIG_KEYBOARD_ATKBD=y
618# CONFIG_KEYBOARD_SUNKBD is not set
619# CONFIG_KEYBOARD_LKKBD is not set
620# CONFIG_KEYBOARD_XTKBD is not set
621# CONFIG_KEYBOARD_NEWTON is not set
622CONFIG_INPUT_MOUSE=y
623CONFIG_MOUSE_PS2=y
624# CONFIG_MOUSE_SERIAL is not set
625# CONFIG_MOUSE_INPORT is not set
626# CONFIG_MOUSE_LOGIBM is not set
627# CONFIG_MOUSE_PC110PAD is not set
628# CONFIG_MOUSE_VSXXXAA is not set
629# CONFIG_INPUT_JOYSTICK is not set
630# CONFIG_INPUT_TOUCHSCREEN is not set
631# CONFIG_INPUT_MISC is not set
632
633#
634# Character devices
635#
636CONFIG_VT=y
637CONFIG_VT_CONSOLE=y
638CONFIG_HW_CONSOLE=y
639# CONFIG_SERIAL_NONSTANDARD is not set
640
641#
642# Serial drivers
643#
644CONFIG_SERIAL_8250=y 55CONFIG_SERIAL_8250=y
645CONFIG_SERIAL_8250_CONSOLE=y 56CONFIG_SERIAL_8250_CONSOLE=y
646CONFIG_SERIAL_8250_NR_UARTS=4
647# CONFIG_SERIAL_8250_EXTENDED is not set
648
649#
650# Non-8250 serial port support
651#
652CONFIG_SERIAL_CORE=y
653CONFIG_SERIAL_CORE_CONSOLE=y
654CONFIG_UNIX98_PTYS=y
655CONFIG_LEGACY_PTYS=y
656CONFIG_LEGACY_PTY_COUNT=256
657
658#
659# IPMI
660#
661# CONFIG_IPMI_HANDLER is not set
662
663#
664# Watchdog Cards
665#
666# CONFIG_WATCHDOG is not set
667CONFIG_RTC=y 57CONFIG_RTC=y
668# CONFIG_DTLK is not set
669# CONFIG_R3964 is not set
670# CONFIG_APPLICOM is not set
671
672#
673# Ftape, the floppy tape device driver
674#
675# CONFIG_FTAPE is not set
676# CONFIG_AGP is not set
677# CONFIG_DRM is not set
678# CONFIG_RAW_DRIVER is not set
679
680#
681# I2C support
682#
683# CONFIG_I2C is not set
684
685#
686# Dallas's 1-wire bus
687#
688# CONFIG_W1 is not set
689
690#
691# Misc devices
692#
693
694#
695# Multimedia devices
696#
697# CONFIG_VIDEO_DEV is not set
698
699#
700# Digital Video Broadcasting Devices
701#
702# CONFIG_DVB is not set
703
704#
705# Graphics support
706#
707# CONFIG_FB is not set
708
709#
710# Console display driver support
711#
712CONFIG_VGA_CONSOLE=y
713# CONFIG_MDA_CONSOLE is not set
714CONFIG_DUMMY_CONSOLE=y
715
716#
717# Sound
718#
719# CONFIG_SOUND is not set
720
721#
722# USB support
723#
724# CONFIG_USB is not set
725
726#
727# USB Gadget Support
728#
729# CONFIG_USB_GADGET is not set
730
731#
732# File systems
733#
734CONFIG_EXT2_FS=y 58CONFIG_EXT2_FS=y
735# CONFIG_EXT2_FS_XATTR is not set
736# CONFIG_EXT3_FS is not set
737# CONFIG_JBD is not set
738CONFIG_REISERFS_FS=m 59CONFIG_REISERFS_FS=m
739# CONFIG_REISERFS_CHECK is not set
740# CONFIG_REISERFS_PROC_INFO is not set
741# CONFIG_REISERFS_FS_XATTR is not set
742# CONFIG_JFS_FS is not set
743# CONFIG_XFS_FS is not set
744# CONFIG_MINIX_FS is not set
745# CONFIG_ROMFS_FS is not set
746# CONFIG_QUOTA is not set
747CONFIG_AUTOFS_FS=m 60CONFIG_AUTOFS_FS=m
748# CONFIG_AUTOFS4_FS is not set
749
750#
751# CD-ROM/DVD Filesystems
752#
753CONFIG_ISO9660_FS=y 61CONFIG_ISO9660_FS=y
754# CONFIG_JOLIET is not set
755# CONFIG_ZISOFS is not set
756# CONFIG_UDF_FS is not set
757
758#
759# DOS/FAT/NT Filesystems
760#
761CONFIG_FAT_FS=y
762CONFIG_MSDOS_FS=y 62CONFIG_MSDOS_FS=y
763CONFIG_VFAT_FS=y 63CONFIG_VFAT_FS=y
764CONFIG_FAT_DEFAULT_CODEPAGE=437
765CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
766# CONFIG_NTFS_FS is not set
767
768#
769# Pseudo filesystems
770#
771CONFIG_PROC_FS=y
772CONFIG_PROC_KCORE=y 64CONFIG_PROC_KCORE=y
773CONFIG_SYSFS=y
774# CONFIG_DEVFS_FS is not set
775# CONFIG_DEVPTS_FS_XATTR is not set
776CONFIG_TMPFS=y 65CONFIG_TMPFS=y
777# CONFIG_HUGETLB_PAGE is not set
778CONFIG_RAMFS=y
779
780#
781# Miscellaneous filesystems
782#
783# CONFIG_ADFS_FS is not set
784# CONFIG_AFFS_FS is not set
785# CONFIG_HFS_FS is not set
786# CONFIG_HFSPLUS_FS is not set
787# CONFIG_BEFS_FS is not set
788# CONFIG_BFS_FS is not set
789# CONFIG_EFS_FS is not set
790# CONFIG_CRAMFS is not set
791# CONFIG_VXFS_FS is not set
792# CONFIG_HPFS_FS is not set
793# CONFIG_QNX4FS_FS is not set
794# CONFIG_SYSV_FS is not set
795# CONFIG_UFS_FS is not set
796
797#
798# Network File Systems
799#
800CONFIG_NFS_FS=m 66CONFIG_NFS_FS=m
801CONFIG_NFS_V3=y 67CONFIG_NFS_V3=y
802# CONFIG_NFS_V4 is not set
803# CONFIG_NFS_DIRECTIO is not set
804CONFIG_NFSD=m 68CONFIG_NFSD=m
805CONFIG_NFSD_V3=y 69CONFIG_NFSD_V3=y
806# CONFIG_NFSD_V4 is not set
807CONFIG_NFSD_TCP=y
808CONFIG_LOCKD=m
809CONFIG_LOCKD_V4=y
810CONFIG_EXPORTFS=m
811CONFIG_SUNRPC=m
812# CONFIG_RPCSEC_GSS_KRB5 is not set
813# CONFIG_RPCSEC_GSS_SPKM3 is not set
814# CONFIG_SMB_FS is not set
815# CONFIG_CIFS is not set
816# CONFIG_NCP_FS is not set
817# CONFIG_CODA_FS is not set
818# CONFIG_AFS_FS is not set
819
820#
821# Partition Types
822#
823# CONFIG_PARTITION_ADVANCED is not set
824CONFIG_OSF_PARTITION=y
825CONFIG_MSDOS_PARTITION=y
826
827#
828# Native Language Support
829#
830CONFIG_NLS=y
831CONFIG_NLS_DEFAULT="iso8859-1"
832CONFIG_NLS_CODEPAGE_437=y 70CONFIG_NLS_CODEPAGE_437=y
833# CONFIG_NLS_CODEPAGE_737 is not set
834# CONFIG_NLS_CODEPAGE_775 is not set
835# CONFIG_NLS_CODEPAGE_850 is not set
836# CONFIG_NLS_CODEPAGE_852 is not set
837# CONFIG_NLS_CODEPAGE_855 is not set
838# CONFIG_NLS_CODEPAGE_857 is not set
839# CONFIG_NLS_CODEPAGE_860 is not set
840# CONFIG_NLS_CODEPAGE_861 is not set
841# CONFIG_NLS_CODEPAGE_862 is not set
842# CONFIG_NLS_CODEPAGE_863 is not set
843# CONFIG_NLS_CODEPAGE_864 is not set
844# CONFIG_NLS_CODEPAGE_865 is not set
845# CONFIG_NLS_CODEPAGE_866 is not set
846# CONFIG_NLS_CODEPAGE_869 is not set
847# CONFIG_NLS_CODEPAGE_936 is not set
848# CONFIG_NLS_CODEPAGE_950 is not set
849# CONFIG_NLS_CODEPAGE_932 is not set
850# CONFIG_NLS_CODEPAGE_949 is not set
851# CONFIG_NLS_CODEPAGE_874 is not set
852# CONFIG_NLS_ISO8859_8 is not set
853# CONFIG_NLS_CODEPAGE_1250 is not set
854# CONFIG_NLS_CODEPAGE_1251 is not set
855# CONFIG_NLS_ASCII is not set
856# CONFIG_NLS_ISO8859_1 is not set
857# CONFIG_NLS_ISO8859_2 is not set
858# CONFIG_NLS_ISO8859_3 is not set
859# CONFIG_NLS_ISO8859_4 is not set
860# CONFIG_NLS_ISO8859_5 is not set
861# CONFIG_NLS_ISO8859_6 is not set
862# CONFIG_NLS_ISO8859_7 is not set
863# CONFIG_NLS_ISO8859_9 is not set
864# CONFIG_NLS_ISO8859_13 is not set
865# CONFIG_NLS_ISO8859_14 is not set
866# CONFIG_NLS_ISO8859_15 is not set
867# CONFIG_NLS_KOI8_R is not set
868# CONFIG_NLS_KOI8_U is not set
869# CONFIG_NLS_UTF8 is not set
870
871#
872# Profiling support
873#
874# CONFIG_PROFILING is not set
875
876#
877# Kernel hacking
878#
879CONFIG_DEBUG_KERNEL=y
880CONFIG_MAGIC_SYSRQ=y 71CONFIG_MAGIC_SYSRQ=y
881# CONFIG_DEBUG_SLAB is not set 72CONFIG_DEBUG_KERNEL=y
882# CONFIG_DEBUG_SPINLOCK is not set
883CONFIG_DEBUG_INFO=y 73CONFIG_DEBUG_INFO=y
884CONFIG_EARLY_PRINTK=y
885# CONFIG_DEBUG_SEMAPHORE is not set
886CONFIG_ALPHA_LEGACY_START_ADDRESS=y 74CONFIG_ALPHA_LEGACY_START_ADDRESS=y
887CONFIG_MATHEMU=y 75CONFIG_MATHEMU=y
888
889#
890# Security options
891#
892# CONFIG_SECURITY is not set
893
894#
895# Cryptographic options
896#
897CONFIG_CRYPTO=y
898CONFIG_CRYPTO_HMAC=y 76CONFIG_CRYPTO_HMAC=y
899# CONFIG_CRYPTO_NULL is not set
900# CONFIG_CRYPTO_MD4 is not set
901CONFIG_CRYPTO_MD5=m
902CONFIG_CRYPTO_SHA1=m
903# CONFIG_CRYPTO_SHA256 is not set
904# CONFIG_CRYPTO_SHA512 is not set
905# CONFIG_CRYPTO_WHIRLPOOL is not set
906CONFIG_CRYPTO_DES=m
907# CONFIG_CRYPTO_BLOWFISH is not set
908# CONFIG_CRYPTO_TWOFISH is not set
909# CONFIG_CRYPTO_SERPENT is not set
910# CONFIG_CRYPTO_AES is not set
911# CONFIG_CRYPTO_CAST5 is not set
912# CONFIG_CRYPTO_CAST6 is not set
913# CONFIG_CRYPTO_TEA is not set
914# CONFIG_CRYPTO_ARC4 is not set
915# CONFIG_CRYPTO_KHAZAD is not set
916# CONFIG_CRYPTO_DEFLATE is not set
917# CONFIG_CRYPTO_MICHAEL_MIC is not set
918# CONFIG_CRYPTO_CRC32C is not set
919# CONFIG_CRYPTO_TEST is not set
920
921#
922# Library routines
923#
924# CONFIG_CRC_CCITT is not set
925CONFIG_CRC32=y
926# CONFIG_LIBCRC32C is not set
diff --git a/arch/alpha/include/asm/Kbuild b/arch/alpha/include/asm/Kbuild
index b7c8f188b313..e423defed91e 100644
--- a/arch/alpha/include/asm/Kbuild
+++ b/arch/alpha/include/asm/Kbuild
@@ -1,11 +1,10 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += compiler.h
4header-y += console.h
5header-y += fpu.h
3header-y += gentrap.h 6header-y += gentrap.h
4header-y += regdef.h
5header-y += pal.h 7header-y += pal.h
6header-y += reg.h 8header-y += reg.h
7 9header-y += regdef.h
8unifdef-y += console.h 10header-y += sysinfo.h
9unifdef-y += fpu.h
10unifdef-y += sysinfo.h
11unifdef-y += compiler.h
diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h
index 1bce8169733c..4567aca6fdd6 100644
--- a/arch/alpha/include/asm/dma-mapping.h
+++ b/arch/alpha/include/asm/dma-mapping.h
@@ -41,9 +41,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
41 41
42#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 42#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
43#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 43#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
44#define dma_is_consistent(d, h) (1)
45 44
46#define dma_cache_sync(dev, va, size, dir) ((void)0) 45#define dma_cache_sync(dev, va, size, dir) ((void)0)
47#define dma_get_cache_alignment() L1_CACHE_BYTES
48 46
49#endif /* _ALPHA_DMA_MAPPING_H */ 47#endif /* _ALPHA_DMA_MAPPING_H */
diff --git a/arch/alpha/include/asm/hw_irq.h b/arch/alpha/include/asm/hw_irq.h
index a37db0f95092..5050ac81cd90 100644
--- a/arch/alpha/include/asm/hw_irq.h
+++ b/arch/alpha/include/asm/hw_irq.h
@@ -3,6 +3,7 @@
3 3
4 4
5extern volatile unsigned long irq_err_count; 5extern volatile unsigned long irq_err_count;
6DECLARE_PER_CPU(unsigned long, irq_pmi_count);
6 7
7#ifdef CONFIG_ALPHA_GENERIC 8#ifdef CONFIG_ALPHA_GENERIC
8#define ACTUAL_NR_IRQS alpha_mv.nr_irqs 9#define ACTUAL_NR_IRQS alpha_mv.nr_irqs
diff --git a/arch/alpha/include/asm/ioctls.h b/arch/alpha/include/asm/ioctls.h
index 67bb9f6fdbe4..59617c3c2be6 100644
--- a/arch/alpha/include/asm/ioctls.h
+++ b/arch/alpha/include/asm/ioctls.h
@@ -80,6 +80,7 @@
80# define TIOCPKT_START 8 80# define TIOCPKT_START 8
81# define TIOCPKT_NOSTOP 16 81# define TIOCPKT_NOSTOP 16
82# define TIOCPKT_DOSTOP 32 82# define TIOCPKT_DOSTOP 32
83# define TIOCPKT_IOCTL 64
83 84
84 85
85#define TIOCNOTTY 0x5422 86#define TIOCNOTTY 0x5422
@@ -91,6 +92,7 @@
91#define TIOCGSID 0x5429 /* Return the session ID of FD */ 92#define TIOCGSID 0x5429 /* Return the session ID of FD */
92#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 93#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
93#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 94#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
95#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
94 96
95#define TIOCSERCONFIG 0x5453 97#define TIOCSERCONFIG 0x5453
96#define TIOCSERGWILD 0x5454 98#define TIOCSERGWILD 0x5454
@@ -106,7 +108,5 @@
106 108
107#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ 109#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
108#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ 110#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
109#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
110#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
111 111
112#endif /* _ASM_ALPHA_IOCTLS_H */ 112#endif /* _ASM_ALPHA_IOCTLS_H */
diff --git a/arch/alpha/include/asm/local64.h b/arch/alpha/include/asm/local64.h
new file mode 100644
index 000000000000..36c93b5cc239
--- /dev/null
+++ b/arch/alpha/include/asm/local64.h
@@ -0,0 +1 @@
#include <asm-generic/local64.h>
diff --git a/arch/alpha/include/asm/md.h b/arch/alpha/include/asm/md.h
deleted file mode 100644
index 6c9b8222a4f2..000000000000
--- a/arch/alpha/include/asm/md.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/* $Id: md.h,v 1.1 1997/12/15 15:11:48 jj Exp $
2 * md.h: High speed xor_block operation for RAID4/5
3 *
4 */
5
6#ifndef __ASM_MD_H
7#define __ASM_MD_H
8
9/* #define HAVE_ARCH_XORBLOCK */
10
11#define MD_XORBLOCK_ALIGNMENT sizeof(long)
12
13#endif /* __ASM_MD_H */
diff --git a/arch/alpha/include/asm/perf_event.h b/arch/alpha/include/asm/perf_event.h
index 3bef8522017c..4157cd3c44a9 100644
--- a/arch/alpha/include/asm/perf_event.h
+++ b/arch/alpha/include/asm/perf_event.h
@@ -2,8 +2,14 @@
2#define __ASM_ALPHA_PERF_EVENT_H 2#define __ASM_ALPHA_PERF_EVENT_H
3 3
4/* Alpha only supports software events through this interface. */ 4/* Alpha only supports software events through this interface. */
5static inline void set_perf_event_pending(void) { } 5extern void set_perf_event_pending(void);
6 6
7#define PERF_EVENT_INDEX_OFFSET 0 7#define PERF_EVENT_INDEX_OFFSET 0
8 8
9#ifdef CONFIG_PERF_EVENTS
10extern void init_hw_perf_events(void);
11#else
12static inline void init_hw_perf_events(void) { }
13#endif
14
9#endif /* __ASM_ALPHA_PERF_EVENT_H */ 15#endif /* __ASM_ALPHA_PERF_EVENT_H */
diff --git a/arch/alpha/include/asm/scatterlist.h b/arch/alpha/include/asm/scatterlist.h
index 5728c52a7412..017d7471c3c4 100644
--- a/arch/alpha/include/asm/scatterlist.h
+++ b/arch/alpha/include/asm/scatterlist.h
@@ -3,6 +3,4 @@
3 3
4#include <asm-generic/scatterlist.h> 4#include <asm-generic/scatterlist.h>
5 5
6#define ISA_DMA_THRESHOLD (~0UL)
7
8#endif /* !(_ALPHA_SCATTERLIST_H) */ 6#endif /* !(_ALPHA_SCATTERLIST_H) */
diff --git a/arch/alpha/include/asm/termbits.h b/arch/alpha/include/asm/termbits.h
index ad854a4a3af6..879dd3589921 100644
--- a/arch/alpha/include/asm/termbits.h
+++ b/arch/alpha/include/asm/termbits.h
@@ -180,6 +180,7 @@ struct ktermios {
180#define FLUSHO 0x00800000 180#define FLUSHO 0x00800000
181#define PENDIN 0x20000000 181#define PENDIN 0x20000000
182#define IEXTEN 0x00000400 182#define IEXTEN 0x00000400
183#define EXTPROC 0x10000000
183 184
184/* Values for the ACTION argument to `tcflow'. */ 185/* Values for the ACTION argument to `tcflow'. */
185#define TCOOFF 0 186#define TCOOFF 0
diff --git a/arch/alpha/include/asm/wrperfmon.h b/arch/alpha/include/asm/wrperfmon.h
new file mode 100644
index 000000000000..319bf6788d87
--- /dev/null
+++ b/arch/alpha/include/asm/wrperfmon.h
@@ -0,0 +1,93 @@
1/*
2 * Definitions for use with the Alpha wrperfmon PAL call.
3 */
4
5#ifndef __ALPHA_WRPERFMON_H
6#define __ALPHA_WRPERFMON_H
7
8/* Following commands are implemented on all CPUs */
9#define PERFMON_CMD_DISABLE 0
10#define PERFMON_CMD_ENABLE 1
11#define PERFMON_CMD_DESIRED_EVENTS 2
12#define PERFMON_CMD_LOGGING_OPTIONS 3
13/* Following commands on EV5/EV56/PCA56 only */
14#define PERFMON_CMD_INT_FREQ 4
15#define PERFMON_CMD_ENABLE_CLEAR 7
16/* Following commands are on EV5 and better CPUs */
17#define PERFMON_CMD_READ 5
18#define PERFMON_CMD_WRITE 6
19/* Following command are on EV6 and better CPUs */
20#define PERFMON_CMD_ENABLE_WRITE 7
21/* Following command are on EV67 and better CPUs */
22#define PERFMON_CMD_I_STAT 8
23#define PERFMON_CMD_PMPC 9
24
25
26/* EV5/EV56/PCA56 Counters */
27#define EV5_PCTR_0 (1UL<<0)
28#define EV5_PCTR_1 (1UL<<1)
29#define EV5_PCTR_2 (1UL<<2)
30
31#define EV5_PCTR_0_COUNT_SHIFT 48
32#define EV5_PCTR_1_COUNT_SHIFT 32
33#define EV5_PCTR_2_COUNT_SHIFT 16
34
35#define EV5_PCTR_0_COUNT_MASK 0xffffUL
36#define EV5_PCTR_1_COUNT_MASK 0xffffUL
37#define EV5_PCTR_2_COUNT_MASK 0x3fffUL
38
39/* EV6 Counters */
40#define EV6_PCTR_0 (1UL<<0)
41#define EV6_PCTR_1 (1UL<<1)
42
43#define EV6_PCTR_0_COUNT_SHIFT 28
44#define EV6_PCTR_1_COUNT_SHIFT 6
45
46#define EV6_PCTR_0_COUNT_MASK 0xfffffUL
47#define EV6_PCTR_1_COUNT_MASK 0xfffffUL
48
49/* EV67 (and subsequent) counters */
50#define EV67_PCTR_0 (1UL<<0)
51#define EV67_PCTR_1 (1UL<<1)
52
53#define EV67_PCTR_0_COUNT_SHIFT 28
54#define EV67_PCTR_1_COUNT_SHIFT 6
55
56#define EV67_PCTR_0_COUNT_MASK 0xfffffUL
57#define EV67_PCTR_1_COUNT_MASK 0xfffffUL
58
59
60/*
61 * The Alpha Architecure Handbook, vers. 4 (1998) appears to have a misprint
62 * in Table E-23 regarding the bits that set the event PCTR 1 counts.
63 * Hopefully what we have here is correct.
64 */
65#define EV6_PCTR_0_EVENT_MASK 0x10UL
66#define EV6_PCTR_1_EVENT_MASK 0x0fUL
67
68/* EV6 Events */
69#define EV6_PCTR_0_CYCLES (0UL << 4)
70#define EV6_PCTR_0_INSTRUCTIONS (1UL << 4)
71
72#define EV6_PCTR_1_CYCLES 0
73#define EV6_PCTR_1_BRANCHES 1
74#define EV6_PCTR_1_BRANCH_MISPREDICTS 2
75#define EV6_PCTR_1_DTB_SINGLE_MISSES 3
76#define EV6_PCTR_1_DTB_DOUBLE_MISSES 4
77#define EV6_PCTR_1_ITB_MISSES 5
78#define EV6_PCTR_1_UNALIGNED_TRAPS 6
79#define EV6_PCTR_1_REPLY_TRAPS 7
80
81/* From the Alpha Architecture Reference Manual, 4th edn., 2002 */
82#define EV67_PCTR_MODE_MASK 0x10UL
83#define EV67_PCTR_EVENT_MASK 0x0CUL
84
85#define EV67_PCTR_MODE_PROFILEME (1UL<<4)
86#define EV67_PCTR_MODE_AGGREGATE (0UL<<4)
87
88#define EV67_PCTR_INSTR_CYCLES (0UL<<2)
89#define EV67_PCTR_CYCLES_UNDEF (1UL<<2)
90#define EV67_PCTR_INSTR_BCACHEMISS (2UL<<2)
91#define EV67_PCTR_CYCLES_MBOX (3UL<<2)
92
93#endif
diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile
index 5a62fb46ef20..1ee9b5b629b8 100644
--- a/arch/alpha/kernel/Makefile
+++ b/arch/alpha/kernel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_SMP) += smp.o
15obj-$(CONFIG_PCI) += pci.o pci_iommu.o pci-sysfs.o 15obj-$(CONFIG_PCI) += pci.o pci_iommu.o pci-sysfs.o
16obj-$(CONFIG_SRM_ENV) += srm_env.o 16obj-$(CONFIG_SRM_ENV) += srm_env.o
17obj-$(CONFIG_MODULES) += module.o 17obj-$(CONFIG_MODULES) += module.o
18obj-$(CONFIG_PERF_EVENTS) += perf_event.o
18 19
19ifdef CONFIG_ALPHA_GENERIC 20ifdef CONFIG_ALPHA_GENERIC
20 21
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 7f912ba3d9ad..fe912984d9b1 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -31,6 +31,7 @@
31#include <asm/uaccess.h> 31#include <asm/uaccess.h>
32 32
33volatile unsigned long irq_err_count; 33volatile unsigned long irq_err_count;
34DEFINE_PER_CPU(unsigned long, irq_pmi_count);
34 35
35void ack_bad_irq(unsigned int irq) 36void ack_bad_irq(unsigned int irq)
36{ 37{
@@ -63,9 +64,7 @@ int irq_select_affinity(unsigned int irq)
63int 64int
64show_interrupts(struct seq_file *p, void *v) 65show_interrupts(struct seq_file *p, void *v)
65{ 66{
66#ifdef CONFIG_SMP
67 int j; 67 int j;
68#endif
69 int irq = *(loff_t *) v; 68 int irq = *(loff_t *) v;
70 struct irqaction * action; 69 struct irqaction * action;
71 unsigned long flags; 70 unsigned long flags;
@@ -112,6 +111,10 @@ unlock:
112 seq_printf(p, "%10lu ", cpu_data[j].ipi_count); 111 seq_printf(p, "%10lu ", cpu_data[j].ipi_count);
113 seq_putc(p, '\n'); 112 seq_putc(p, '\n');
114#endif 113#endif
114 seq_puts(p, "PMI: ");
115 for_each_online_cpu(j)
116 seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j));
117 seq_puts(p, " Performance Monitoring\n");
115 seq_printf(p, "ERR: %10lu\n", irq_err_count); 118 seq_printf(p, "ERR: %10lu\n", irq_err_count);
116 } 119 }
117 return 0; 120 return 0;
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index cfde865b78e0..5f77afb88e89 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -10,6 +10,7 @@
10 10
11#include <asm/machvec.h> 11#include <asm/machvec.h>
12#include <asm/dma.h> 12#include <asm/dma.h>
13#include <asm/perf_event.h>
13 14
14#include "proto.h" 15#include "proto.h"
15#include "irq_impl.h" 16#include "irq_impl.h"
@@ -111,6 +112,8 @@ init_IRQ(void)
111 wrent(entInt, 0); 112 wrent(entInt, 0);
112 113
113 alpha_mv.init_irq(); 114 alpha_mv.init_irq();
115
116 init_hw_perf_events();
114} 117}
115 118
116/* 119/*
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index de9d39717808..fb58150a7e8f 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -234,17 +234,17 @@ linux_to_osf_statfs(struct kstatfs *linux_stat, struct osf_statfs __user *osf_st
234} 234}
235 235
236static int 236static int
237do_osf_statfs(struct dentry * dentry, struct osf_statfs __user *buffer, 237do_osf_statfs(struct path *path, struct osf_statfs __user *buffer,
238 unsigned long bufsiz) 238 unsigned long bufsiz)
239{ 239{
240 struct kstatfs linux_stat; 240 struct kstatfs linux_stat;
241 int error = vfs_statfs(dentry, &linux_stat); 241 int error = vfs_statfs(path, &linux_stat);
242 if (!error) 242 if (!error)
243 error = linux_to_osf_statfs(&linux_stat, buffer, bufsiz); 243 error = linux_to_osf_statfs(&linux_stat, buffer, bufsiz);
244 return error; 244 return error;
245} 245}
246 246
247SYSCALL_DEFINE3(osf_statfs, char __user *, pathname, 247SYSCALL_DEFINE3(osf_statfs, const char __user *, pathname,
248 struct osf_statfs __user *, buffer, unsigned long, bufsiz) 248 struct osf_statfs __user *, buffer, unsigned long, bufsiz)
249{ 249{
250 struct path path; 250 struct path path;
@@ -252,7 +252,7 @@ SYSCALL_DEFINE3(osf_statfs, char __user *, pathname,
252 252
253 retval = user_path(pathname, &path); 253 retval = user_path(pathname, &path);
254 if (!retval) { 254 if (!retval) {
255 retval = do_osf_statfs(path.dentry, buffer, bufsiz); 255 retval = do_osf_statfs(&path buffer, bufsiz);
256 path_put(&path); 256 path_put(&path);
257 } 257 }
258 return retval; 258 return retval;
@@ -267,7 +267,7 @@ SYSCALL_DEFINE3(osf_fstatfs, unsigned long, fd,
267 retval = -EBADF; 267 retval = -EBADF;
268 file = fget(fd); 268 file = fget(fd);
269 if (file) { 269 if (file) {
270 retval = do_osf_statfs(file->f_path.dentry, buffer, bufsiz); 270 retval = do_osf_statfs(&file->f_path, buffer, bufsiz);
271 fput(file); 271 fput(file);
272 } 272 }
273 return retval; 273 return retval;
@@ -358,7 +358,7 @@ osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags)
358 return do_mount("", dirname, "proc", flags, NULL); 358 return do_mount("", dirname, "proc", flags, NULL);
359} 359}
360 360
361SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path, 361SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, const char __user *, path,
362 int, flag, void __user *, data) 362 int, flag, void __user *, data)
363{ 363{
364 int retval; 364 int retval;
@@ -932,7 +932,7 @@ SYSCALL_DEFINE3(osf_setitimer, int, which, struct itimerval32 __user *, in,
932 932
933} 933}
934 934
935SYSCALL_DEFINE2(osf_utimes, char __user *, filename, 935SYSCALL_DEFINE2(osf_utimes, const char __user *, filename,
936 struct timeval32 __user *, tvs) 936 struct timeval32 __user *, tvs)
937{ 937{
938 struct timespec tv[2]; 938 struct timespec tv[2];
diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c
new file mode 100644
index 000000000000..51c39fa41693
--- /dev/null
+++ b/arch/alpha/kernel/perf_event.c
@@ -0,0 +1,842 @@
1/*
2 * Hardware performance events for the Alpha.
3 *
4 * We implement HW counts on the EV67 and subsequent CPUs only.
5 *
6 * (C) 2010 Michael J. Cree
7 *
8 * Somewhat based on the Sparc code, and to a lesser extent the PowerPC and
9 * ARM code, which are copyright by their respective authors.
10 */
11
12#include <linux/perf_event.h>
13#include <linux/kprobes.h>
14#include <linux/kernel.h>
15#include <linux/kdebug.h>
16#include <linux/mutex.h>
17
18#include <asm/hwrpb.h>
19#include <asm/atomic.h>
20#include <asm/irq.h>
21#include <asm/irq_regs.h>
22#include <asm/pal.h>
23#include <asm/wrperfmon.h>
24#include <asm/hw_irq.h>
25
26
27/* The maximum number of PMCs on any Alpha CPU whatsoever. */
28#define MAX_HWEVENTS 3
29#define PMC_NO_INDEX -1
30
31/* For tracking PMCs and the hw events they monitor on each CPU. */
32struct cpu_hw_events {
33 int enabled;
34 /* Number of events scheduled; also number entries valid in arrays below. */
35 int n_events;
36 /* Number events added since last hw_perf_disable(). */
37 int n_added;
38 /* Events currently scheduled. */
39 struct perf_event *event[MAX_HWEVENTS];
40 /* Event type of each scheduled event. */
41 unsigned long evtype[MAX_HWEVENTS];
42 /* Current index of each scheduled event; if not yet determined
43 * contains PMC_NO_INDEX.
44 */
45 int current_idx[MAX_HWEVENTS];
46 /* The active PMCs' config for easy use with wrperfmon(). */
47 unsigned long config;
48 /* The active counters' indices for easy use with wrperfmon(). */
49 unsigned long idx_mask;
50};
51DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
52
53
54
55/*
56 * A structure to hold the description of the PMCs available on a particular
57 * type of Alpha CPU.
58 */
59struct alpha_pmu_t {
60 /* Mapping of the perf system hw event types to indigenous event types */
61 const int *event_map;
62 /* The number of entries in the event_map */
63 int max_events;
64 /* The number of PMCs on this Alpha */
65 int num_pmcs;
66 /*
67 * All PMC counters reside in the IBOX register PCTR. This is the
68 * LSB of the counter.
69 */
70 int pmc_count_shift[MAX_HWEVENTS];
71 /*
72 * The mask that isolates the PMC bits when the LSB of the counter
73 * is shifted to bit 0.
74 */
75 unsigned long pmc_count_mask[MAX_HWEVENTS];
76 /* The maximum period the PMC can count. */
77 unsigned long pmc_max_period[MAX_HWEVENTS];
78 /*
79 * The maximum value that may be written to the counter due to
80 * hardware restrictions is pmc_max_period - pmc_left.
81 */
82 long pmc_left[3];
83 /* Subroutine for allocation of PMCs. Enforces constraints. */
84 int (*check_constraints)(struct perf_event **, unsigned long *, int);
85};
86
87/*
88 * The Alpha CPU PMU description currently in operation. This is set during
89 * the boot process to the specific CPU of the machine.
90 */
91static const struct alpha_pmu_t *alpha_pmu;
92
93
94#define HW_OP_UNSUPPORTED -1
95
96/*
97 * The hardware description of the EV67, EV68, EV69, EV7 and EV79 PMUs
98 * follow. Since they are identical we refer to them collectively as the
99 * EV67 henceforth.
100 */
101
102/*
103 * EV67 PMC event types
104 *
105 * There is no one-to-one mapping of the possible hw event types to the
106 * actual codes that are used to program the PMCs hence we introduce our
107 * own hw event type identifiers.
108 */
109enum ev67_pmc_event_type {
110 EV67_CYCLES = 1,
111 EV67_INSTRUCTIONS,
112 EV67_BCACHEMISS,
113 EV67_MBOXREPLAY,
114 EV67_LAST_ET
115};
116#define EV67_NUM_EVENT_TYPES (EV67_LAST_ET-EV67_CYCLES)
117
118
119/* Mapping of the hw event types to the perf tool interface */
120static const int ev67_perfmon_event_map[] = {
121 [PERF_COUNT_HW_CPU_CYCLES] = EV67_CYCLES,
122 [PERF_COUNT_HW_INSTRUCTIONS] = EV67_INSTRUCTIONS,
123 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
124 [PERF_COUNT_HW_CACHE_MISSES] = EV67_BCACHEMISS,
125};
126
127struct ev67_mapping_t {
128 int config;
129 int idx;
130};
131
132/*
133 * The mapping used for one event only - these must be in same order as enum
134 * ev67_pmc_event_type definition.
135 */
136static const struct ev67_mapping_t ev67_mapping[] = {
137 {EV67_PCTR_INSTR_CYCLES, 1}, /* EV67_CYCLES, */
138 {EV67_PCTR_INSTR_CYCLES, 0}, /* EV67_INSTRUCTIONS */
139 {EV67_PCTR_INSTR_BCACHEMISS, 1}, /* EV67_BCACHEMISS */
140 {EV67_PCTR_CYCLES_MBOX, 1} /* EV67_MBOXREPLAY */
141};
142
143
144/*
145 * Check that a group of events can be simultaneously scheduled on to the
146 * EV67 PMU. Also allocate counter indices and config.
147 */
148static int ev67_check_constraints(struct perf_event **event,
149 unsigned long *evtype, int n_ev)
150{
151 int idx0;
152 unsigned long config;
153
154 idx0 = ev67_mapping[evtype[0]-1].idx;
155 config = ev67_mapping[evtype[0]-1].config;
156 if (n_ev == 1)
157 goto success;
158
159 BUG_ON(n_ev != 2);
160
161 if (evtype[0] == EV67_MBOXREPLAY || evtype[1] == EV67_MBOXREPLAY) {
162 /* MBOX replay traps must be on PMC 1 */
163 idx0 = (evtype[0] == EV67_MBOXREPLAY) ? 1 : 0;
164 /* Only cycles can accompany MBOX replay traps */
165 if (evtype[idx0] == EV67_CYCLES) {
166 config = EV67_PCTR_CYCLES_MBOX;
167 goto success;
168 }
169 }
170
171 if (evtype[0] == EV67_BCACHEMISS || evtype[1] == EV67_BCACHEMISS) {
172 /* Bcache misses must be on PMC 1 */
173 idx0 = (evtype[0] == EV67_BCACHEMISS) ? 1 : 0;
174 /* Only instructions can accompany Bcache misses */
175 if (evtype[idx0] == EV67_INSTRUCTIONS) {
176 config = EV67_PCTR_INSTR_BCACHEMISS;
177 goto success;
178 }
179 }
180
181 if (evtype[0] == EV67_INSTRUCTIONS || evtype[1] == EV67_INSTRUCTIONS) {
182 /* Instructions must be on PMC 0 */
183 idx0 = (evtype[0] == EV67_INSTRUCTIONS) ? 0 : 1;
184 /* By this point only cycles can accompany instructions */
185 if (evtype[idx0^1] == EV67_CYCLES) {
186 config = EV67_PCTR_INSTR_CYCLES;
187 goto success;
188 }
189 }
190
191 /* Otherwise, darn it, there is a conflict. */
192 return -1;
193
194success:
195 event[0]->hw.idx = idx0;
196 event[0]->hw.config_base = config;
197 if (n_ev == 2) {
198 event[1]->hw.idx = idx0 ^ 1;
199 event[1]->hw.config_base = config;
200 }
201 return 0;
202}
203
204
205static const struct alpha_pmu_t ev67_pmu = {
206 .event_map = ev67_perfmon_event_map,
207 .max_events = ARRAY_SIZE(ev67_perfmon_event_map),
208 .num_pmcs = 2,
209 .pmc_count_shift = {EV67_PCTR_0_COUNT_SHIFT, EV67_PCTR_1_COUNT_SHIFT, 0},
210 .pmc_count_mask = {EV67_PCTR_0_COUNT_MASK, EV67_PCTR_1_COUNT_MASK, 0},
211 .pmc_max_period = {(1UL<<20) - 1, (1UL<<20) - 1, 0},
212 .pmc_left = {16, 4, 0},
213 .check_constraints = ev67_check_constraints
214};
215
216
217
218/*
219 * Helper routines to ensure that we read/write only the correct PMC bits
220 * when calling the wrperfmon PALcall.
221 */
222static inline void alpha_write_pmc(int idx, unsigned long val)
223{
224 val &= alpha_pmu->pmc_count_mask[idx];
225 val <<= alpha_pmu->pmc_count_shift[idx];
226 val |= (1<<idx);
227 wrperfmon(PERFMON_CMD_WRITE, val);
228}
229
230static inline unsigned long alpha_read_pmc(int idx)
231{
232 unsigned long val;
233
234 val = wrperfmon(PERFMON_CMD_READ, 0);
235 val >>= alpha_pmu->pmc_count_shift[idx];
236 val &= alpha_pmu->pmc_count_mask[idx];
237 return val;
238}
239
240/* Set a new period to sample over */
241static int alpha_perf_event_set_period(struct perf_event *event,
242 struct hw_perf_event *hwc, int idx)
243{
244 long left = atomic64_read(&hwc->period_left);
245 long period = hwc->sample_period;
246 int ret = 0;
247
248 if (unlikely(left <= -period)) {
249 left = period;
250 atomic64_set(&hwc->period_left, left);
251 hwc->last_period = period;
252 ret = 1;
253 }
254
255 if (unlikely(left <= 0)) {
256 left += period;
257 atomic64_set(&hwc->period_left, left);
258 hwc->last_period = period;
259 ret = 1;
260 }
261
262 /*
263 * Hardware restrictions require that the counters must not be
264 * written with values that are too close to the maximum period.
265 */
266 if (unlikely(left < alpha_pmu->pmc_left[idx]))
267 left = alpha_pmu->pmc_left[idx];
268
269 if (left > (long)alpha_pmu->pmc_max_period[idx])
270 left = alpha_pmu->pmc_max_period[idx];
271
272 atomic64_set(&hwc->prev_count, (unsigned long)(-left));
273
274 alpha_write_pmc(idx, (unsigned long)(-left));
275
276 perf_event_update_userpage(event);
277
278 return ret;
279}
280
281
282/*
283 * Calculates the count (the 'delta') since the last time the PMC was read.
284 *
285 * As the PMCs' full period can easily be exceeded within the perf system
286 * sampling period we cannot use any high order bits as a guard bit in the
287 * PMCs to detect overflow as is done by other architectures. The code here
288 * calculates the delta on the basis that there is no overflow when ovf is
289 * zero. The value passed via ovf by the interrupt handler corrects for
290 * overflow.
291 *
292 * This can be racey on rare occasions -- a call to this routine can occur
293 * with an overflowed counter just before the PMI service routine is called.
294 * The check for delta negative hopefully always rectifies this situation.
295 */
296static unsigned long alpha_perf_event_update(struct perf_event *event,
297 struct hw_perf_event *hwc, int idx, long ovf)
298{
299 long prev_raw_count, new_raw_count;
300 long delta;
301
302again:
303 prev_raw_count = atomic64_read(&hwc->prev_count);
304 new_raw_count = alpha_read_pmc(idx);
305
306 if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
307 new_raw_count) != prev_raw_count)
308 goto again;
309
310 delta = (new_raw_count - (prev_raw_count & alpha_pmu->pmc_count_mask[idx])) + ovf;
311
312 /* It is possible on very rare occasions that the PMC has overflowed
313 * but the interrupt is yet to come. Detect and fix this situation.
314 */
315 if (unlikely(delta < 0)) {
316 delta += alpha_pmu->pmc_max_period[idx] + 1;
317 }
318
319 atomic64_add(delta, &event->count);
320 atomic64_sub(delta, &hwc->period_left);
321
322 return new_raw_count;
323}
324
325
326/*
327 * Collect all HW events into the array event[].
328 */
329static int collect_events(struct perf_event *group, int max_count,
330 struct perf_event *event[], unsigned long *evtype,
331 int *current_idx)
332{
333 struct perf_event *pe;
334 int n = 0;
335
336 if (!is_software_event(group)) {
337 if (n >= max_count)
338 return -1;
339 event[n] = group;
340 evtype[n] = group->hw.event_base;
341 current_idx[n++] = PMC_NO_INDEX;
342 }
343 list_for_each_entry(pe, &group->sibling_list, group_entry) {
344 if (!is_software_event(pe) && pe->state != PERF_EVENT_STATE_OFF) {
345 if (n >= max_count)
346 return -1;
347 event[n] = pe;
348 evtype[n] = pe->hw.event_base;
349 current_idx[n++] = PMC_NO_INDEX;
350 }
351 }
352 return n;
353}
354
355
356
357/*
358 * Check that a group of events can be simultaneously scheduled on to the PMU.
359 */
360static int alpha_check_constraints(struct perf_event **events,
361 unsigned long *evtypes, int n_ev)
362{
363
364 /* No HW events is possible from hw_perf_group_sched_in(). */
365 if (n_ev == 0)
366 return 0;
367
368 if (n_ev > alpha_pmu->num_pmcs)
369 return -1;
370
371 return alpha_pmu->check_constraints(events, evtypes, n_ev);
372}
373
374
375/*
376 * If new events have been scheduled then update cpuc with the new
377 * configuration. This may involve shifting cycle counts from one PMC to
378 * another.
379 */
380static void maybe_change_configuration(struct cpu_hw_events *cpuc)
381{
382 int j;
383
384 if (cpuc->n_added == 0)
385 return;
386
387 /* Find counters that are moving to another PMC and update */
388 for (j = 0; j < cpuc->n_events; j++) {
389 struct perf_event *pe = cpuc->event[j];
390
391 if (cpuc->current_idx[j] != PMC_NO_INDEX &&
392 cpuc->current_idx[j] != pe->hw.idx) {
393 alpha_perf_event_update(pe, &pe->hw, cpuc->current_idx[j], 0);
394 cpuc->current_idx[j] = PMC_NO_INDEX;
395 }
396 }
397
398 /* Assign to counters all unassigned events. */
399 cpuc->idx_mask = 0;
400 for (j = 0; j < cpuc->n_events; j++) {
401 struct perf_event *pe = cpuc->event[j];
402 struct hw_perf_event *hwc = &pe->hw;
403 int idx = hwc->idx;
404
405 if (cpuc->current_idx[j] != PMC_NO_INDEX) {
406 cpuc->idx_mask |= (1<<cpuc->current_idx[j]);
407 continue;
408 }
409
410 alpha_perf_event_set_period(pe, hwc, idx);
411 cpuc->current_idx[j] = idx;
412 cpuc->idx_mask |= (1<<cpuc->current_idx[j]);
413 }
414 cpuc->config = cpuc->event[0]->hw.config_base;
415}
416
417
418
419/* Schedule perf HW event on to PMU.
420 * - this function is called from outside this module via the pmu struct
421 * returned from perf event initialisation.
422 */
423static int alpha_pmu_enable(struct perf_event *event)
424{
425 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
426 int n0;
427 int ret;
428 unsigned long flags;
429
430 /*
431 * The Sparc code has the IRQ disable first followed by the perf
432 * disable, however this can lead to an overflowed counter with the
433 * PMI disabled on rare occasions. The alpha_perf_event_update()
434 * routine should detect this situation by noting a negative delta,
435 * nevertheless we disable the PMCs first to enable a potential
436 * final PMI to occur before we disable interrupts.
437 */
438 perf_disable();
439 local_irq_save(flags);
440
441 /* Default to error to be returned */
442 ret = -EAGAIN;
443
444 /* Insert event on to PMU and if successful modify ret to valid return */
445 n0 = cpuc->n_events;
446 if (n0 < alpha_pmu->num_pmcs) {
447 cpuc->event[n0] = event;
448 cpuc->evtype[n0] = event->hw.event_base;
449 cpuc->current_idx[n0] = PMC_NO_INDEX;
450
451 if (!alpha_check_constraints(cpuc->event, cpuc->evtype, n0+1)) {
452 cpuc->n_events++;
453 cpuc->n_added++;
454 ret = 0;
455 }
456 }
457
458 local_irq_restore(flags);
459 perf_enable();
460
461 return ret;
462}
463
464
465
466/* Disable performance monitoring unit
467 * - this function is called from outside this module via the pmu struct
468 * returned from perf event initialisation.
469 */
470static void alpha_pmu_disable(struct perf_event *event)
471{
472 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
473 struct hw_perf_event *hwc = &event->hw;
474 unsigned long flags;
475 int j;
476
477 perf_disable();
478 local_irq_save(flags);
479
480 for (j = 0; j < cpuc->n_events; j++) {
481 if (event == cpuc->event[j]) {
482 int idx = cpuc->current_idx[j];
483
484 /* Shift remaining entries down into the existing
485 * slot.
486 */
487 while (++j < cpuc->n_events) {
488 cpuc->event[j - 1] = cpuc->event[j];
489 cpuc->evtype[j - 1] = cpuc->evtype[j];
490 cpuc->current_idx[j - 1] =
491 cpuc->current_idx[j];
492 }
493
494 /* Absorb the final count and turn off the event. */
495 alpha_perf_event_update(event, hwc, idx, 0);
496 perf_event_update_userpage(event);
497
498 cpuc->idx_mask &= ~(1UL<<idx);
499 cpuc->n_events--;
500 break;
501 }
502 }
503
504 local_irq_restore(flags);
505 perf_enable();
506}
507
508
509static void alpha_pmu_read(struct perf_event *event)
510{
511 struct hw_perf_event *hwc = &event->hw;
512
513 alpha_perf_event_update(event, hwc, hwc->idx, 0);
514}
515
516
517static void alpha_pmu_unthrottle(struct perf_event *event)
518{
519 struct hw_perf_event *hwc = &event->hw;
520 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
521
522 cpuc->idx_mask |= 1UL<<hwc->idx;
523 wrperfmon(PERFMON_CMD_ENABLE, (1UL<<hwc->idx));
524}
525
526
527/*
528 * Check that CPU performance counters are supported.
529 * - currently support EV67 and later CPUs.
530 * - actually some later revisions of the EV6 have the same PMC model as the
531 * EV67 but we don't do suffiently deep CPU detection to detect them.
532 * Bad luck to the very few people who might have one, I guess.
533 */
534static int supported_cpu(void)
535{
536 struct percpu_struct *cpu;
537 unsigned long cputype;
538
539 /* Get cpu type from HW */
540 cpu = (struct percpu_struct *)((char *)hwrpb + hwrpb->processor_offset);
541 cputype = cpu->type & 0xffffffff;
542 /* Include all of EV67, EV68, EV7, EV79 and EV69 as supported. */
543 return (cputype >= EV67_CPU) && (cputype <= EV69_CPU);
544}
545
546
547
548static void hw_perf_event_destroy(struct perf_event *event)
549{
550 /* Nothing to be done! */
551 return;
552}
553
554
555
556static int __hw_perf_event_init(struct perf_event *event)
557{
558 struct perf_event_attr *attr = &event->attr;
559 struct hw_perf_event *hwc = &event->hw;
560 struct perf_event *evts[MAX_HWEVENTS];
561 unsigned long evtypes[MAX_HWEVENTS];
562 int idx_rubbish_bin[MAX_HWEVENTS];
563 int ev;
564 int n;
565
566 /* We only support a limited range of HARDWARE event types with one
567 * only programmable via a RAW event type.
568 */
569 if (attr->type == PERF_TYPE_HARDWARE) {
570 if (attr->config >= alpha_pmu->max_events)
571 return -EINVAL;
572 ev = alpha_pmu->event_map[attr->config];
573 } else if (attr->type == PERF_TYPE_HW_CACHE) {
574 return -EOPNOTSUPP;
575 } else if (attr->type == PERF_TYPE_RAW) {
576 ev = attr->config & 0xff;
577 } else {
578 return -EOPNOTSUPP;
579 }
580
581 if (ev < 0) {
582 return ev;
583 }
584
585 /* The EV67 does not support mode exclusion */
586 if (attr->exclude_kernel || attr->exclude_user
587 || attr->exclude_hv || attr->exclude_idle) {
588 return -EPERM;
589 }
590
591 /*
592 * We place the event type in event_base here and leave calculation
593 * of the codes to programme the PMU for alpha_pmu_enable() because
594 * it is only then we will know what HW events are actually
595 * scheduled on to the PMU. At that point the code to programme the
596 * PMU is put into config_base and the PMC to use is placed into
597 * idx. We initialise idx (below) to PMC_NO_INDEX to indicate that
598 * it is yet to be determined.
599 */
600 hwc->event_base = ev;
601
602 /* Collect events in a group together suitable for calling
603 * alpha_check_constraints() to verify that the group as a whole can
604 * be scheduled on to the PMU.
605 */
606 n = 0;
607 if (event->group_leader != event) {
608 n = collect_events(event->group_leader,
609 alpha_pmu->num_pmcs - 1,
610 evts, evtypes, idx_rubbish_bin);
611 if (n < 0)
612 return -EINVAL;
613 }
614 evtypes[n] = hwc->event_base;
615 evts[n] = event;
616
617 if (alpha_check_constraints(evts, evtypes, n + 1))
618 return -EINVAL;
619
620 /* Indicate that PMU config and idx are yet to be determined. */
621 hwc->config_base = 0;
622 hwc->idx = PMC_NO_INDEX;
623
624 event->destroy = hw_perf_event_destroy;
625
626 /*
627 * Most architectures reserve the PMU for their use at this point.
628 * As there is no existing mechanism to arbitrate usage and there
629 * appears to be no other user of the Alpha PMU we just assume
630 * that we can just use it, hence a NO-OP here.
631 *
632 * Maybe an alpha_reserve_pmu() routine should be implemented but is
633 * anything else ever going to use it?
634 */
635
636 if (!hwc->sample_period) {
637 hwc->sample_period = alpha_pmu->pmc_max_period[0];
638 hwc->last_period = hwc->sample_period;
639 atomic64_set(&hwc->period_left, hwc->sample_period);
640 }
641
642 return 0;
643}
644
645static const struct pmu pmu = {
646 .enable = alpha_pmu_enable,
647 .disable = alpha_pmu_disable,
648 .read = alpha_pmu_read,
649 .unthrottle = alpha_pmu_unthrottle,
650};
651
652
653/*
654 * Main entry point to initialise a HW performance event.
655 */
656const struct pmu *hw_perf_event_init(struct perf_event *event)
657{
658 int err;
659
660 if (!alpha_pmu)
661 return ERR_PTR(-ENODEV);
662
663 /* Do the real initialisation work. */
664 err = __hw_perf_event_init(event);
665
666 if (err)
667 return ERR_PTR(err);
668
669 return &pmu;
670}
671
672
673
674/*
675 * Main entry point - enable HW performance counters.
676 */
677void hw_perf_enable(void)
678{
679 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
680
681 if (cpuc->enabled)
682 return;
683
684 cpuc->enabled = 1;
685 barrier();
686
687 if (cpuc->n_events > 0) {
688 /* Update cpuc with information from any new scheduled events. */
689 maybe_change_configuration(cpuc);
690
691 /* Start counting the desired events. */
692 wrperfmon(PERFMON_CMD_LOGGING_OPTIONS, EV67_PCTR_MODE_AGGREGATE);
693 wrperfmon(PERFMON_CMD_DESIRED_EVENTS, cpuc->config);
694 wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask);
695 }
696}
697
698
699/*
700 * Main entry point - disable HW performance counters.
701 */
702
703void hw_perf_disable(void)
704{
705 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
706
707 if (!cpuc->enabled)
708 return;
709
710 cpuc->enabled = 0;
711 cpuc->n_added = 0;
712
713 wrperfmon(PERFMON_CMD_DISABLE, cpuc->idx_mask);
714}
715
716
717/*
718 * Main entry point - don't know when this is called but it
719 * obviously dumps debug info.
720 */
721void perf_event_print_debug(void)
722{
723 unsigned long flags;
724 unsigned long pcr;
725 int pcr0, pcr1;
726 int cpu;
727
728 if (!supported_cpu())
729 return;
730
731 local_irq_save(flags);
732
733 cpu = smp_processor_id();
734
735 pcr = wrperfmon(PERFMON_CMD_READ, 0);
736 pcr0 = (pcr >> alpha_pmu->pmc_count_shift[0]) & alpha_pmu->pmc_count_mask[0];
737 pcr1 = (pcr >> alpha_pmu->pmc_count_shift[1]) & alpha_pmu->pmc_count_mask[1];
738
739 pr_info("CPU#%d: PCTR0[%06x] PCTR1[%06x]\n", cpu, pcr0, pcr1);
740
741 local_irq_restore(flags);
742}
743
744
745/*
746 * Performance Monitoring Interrupt Service Routine called when a PMC
747 * overflows. The PMC that overflowed is passed in la_ptr.
748 */
749static void alpha_perf_event_irq_handler(unsigned long la_ptr,
750 struct pt_regs *regs)
751{
752 struct cpu_hw_events *cpuc;
753 struct perf_sample_data data;
754 struct perf_event *event;
755 struct hw_perf_event *hwc;
756 int idx, j;
757
758 __get_cpu_var(irq_pmi_count)++;
759 cpuc = &__get_cpu_var(cpu_hw_events);
760
761 /* Completely counting through the PMC's period to trigger a new PMC
762 * overflow interrupt while in this interrupt routine is utterly
763 * disastrous! The EV6 and EV67 counters are sufficiently large to
764 * prevent this but to be really sure disable the PMCs.
765 */
766 wrperfmon(PERFMON_CMD_DISABLE, cpuc->idx_mask);
767
768 /* la_ptr is the counter that overflowed. */
769 if (unlikely(la_ptr >= perf_max_events)) {
770 /* This should never occur! */
771 irq_err_count++;
772 pr_warning("PMI: silly index %ld\n", la_ptr);
773 wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask);
774 return;
775 }
776
777 idx = la_ptr;
778
779 perf_sample_data_init(&data, 0);
780 for (j = 0; j < cpuc->n_events; j++) {
781 if (cpuc->current_idx[j] == idx)
782 break;
783 }
784
785 if (unlikely(j == cpuc->n_events)) {
786 /* This can occur if the event is disabled right on a PMC overflow. */
787 wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask);
788 return;
789 }
790
791 event = cpuc->event[j];
792
793 if (unlikely(!event)) {
794 /* This should never occur! */
795 irq_err_count++;
796 pr_warning("PMI: No event at index %d!\n", idx);
797 wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask);
798 return;
799 }
800
801 hwc = &event->hw;
802 alpha_perf_event_update(event, hwc, idx, alpha_pmu->pmc_max_period[idx]+1);
803 data.period = event->hw.last_period;
804
805 if (alpha_perf_event_set_period(event, hwc, idx)) {
806 if (perf_event_overflow(event, 1, &data, regs)) {
807 /* Interrupts coming too quickly; "throttle" the
808 * counter, i.e., disable it for a little while.
809 */
810 cpuc->idx_mask &= ~(1UL<<idx);
811 }
812 }
813 wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask);
814
815 return;
816}
817
818
819
820/*
821 * Init call to initialise performance events at kernel startup.
822 */
823void __init init_hw_perf_events(void)
824{
825 pr_info("Performance events: ");
826
827 if (!supported_cpu()) {
828 pr_cont("No support for your CPU.\n");
829 return;
830 }
831
832 pr_cont("Supported CPU type!\n");
833
834 /* Override performance counter IRQ vector */
835
836 perf_irq = alpha_perf_event_irq_handler;
837
838 /* And set up PMU specification */
839 alpha_pmu = &ev67_pmu;
840 perf_max_events = alpha_pmu->num_pmcs;
841}
842
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 395a464353b8..88e608aebc8c 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -387,7 +387,7 @@ EXPORT_SYMBOL(dump_elf_task_fp);
387 * sys_execve() executes a new program. 387 * sys_execve() executes a new program.
388 */ 388 */
389asmlinkage int 389asmlinkage int
390do_sys_execve(char __user *ufilename, char __user * __user *argv, 390do_sys_execve(const char __user *ufilename, char __user * __user *argv,
391 char __user * __user *envp, struct pt_regs *regs) 391 char __user * __user *envp, struct pt_regs *regs)
392{ 392{
393 int error; 393 int error;
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index 1efbed82c0fd..eacceb26d9c8 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -41,6 +41,7 @@
41#include <linux/init.h> 41#include <linux/init.h>
42#include <linux/bcd.h> 42#include <linux/bcd.h>
43#include <linux/profile.h> 43#include <linux/profile.h>
44#include <linux/perf_event.h>
44 45
45#include <asm/uaccess.h> 46#include <asm/uaccess.h>
46#include <asm/io.h> 47#include <asm/io.h>
@@ -82,6 +83,26 @@ static struct {
82 83
83unsigned long est_cycle_freq; 84unsigned long est_cycle_freq;
84 85
86#ifdef CONFIG_PERF_EVENTS
87
88DEFINE_PER_CPU(u8, perf_event_pending);
89
90#define set_perf_event_pending_flag() __get_cpu_var(perf_event_pending) = 1
91#define test_perf_event_pending() __get_cpu_var(perf_event_pending)
92#define clear_perf_event_pending() __get_cpu_var(perf_event_pending) = 0
93
94void set_perf_event_pending(void)
95{
96 set_perf_event_pending_flag();
97}
98
99#else /* CONFIG_PERF_EVENTS */
100
101#define test_perf_event_pending() 0
102#define clear_perf_event_pending()
103
104#endif /* CONFIG_PERF_EVENTS */
105
85 106
86static inline __u32 rpcc(void) 107static inline __u32 rpcc(void)
87{ 108{
@@ -175,6 +196,11 @@ irqreturn_t timer_interrupt(int irq, void *dev)
175 update_process_times(user_mode(get_irq_regs())); 196 update_process_times(user_mode(get_irq_regs()));
176#endif 197#endif
177 198
199 if (test_perf_event_pending()) {
200 clear_perf_event_pending();
201 perf_event_do_pending();
202 }
203
178 return IRQ_HANDLED; 204 return IRQ_HANDLED;
179} 205}
180 206
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 16:54:00 -0500