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authorBjorn Helgaas <bhelgaas@google.com>2011-10-28 18:26:11 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2012-01-06 15:10:55 -0500
commita2f33da11ab9efba25d41e959de6338a9078fb36 (patch)
tree45d74834a4adb37d8e9554e134bc8d4dec638645 /arch/alpha
parent7e00fe2e53fd3a1540febcb2d2bee9d0b2eea507 (diff)
alpha/PCI: convert to pci_scan_root_bus() for correct root bus resources
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. v2: fix up conversion CC: linux-alpha@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'arch/alpha')
-rw-r--r--arch/alpha/kernel/pci.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index c9ab94ee1ca8..fcb4b914d4bb 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
281void __devinit 281void __devinit
282pcibios_fixup_bus(struct pci_bus *bus) 282pcibios_fixup_bus(struct pci_bus *bus)
283{ 283{
284 /* Propagate hose info into the subordinate devices. */
285
286 struct pci_controller *hose = bus->sysdata;
287 struct pci_dev *dev = bus->self; 284 struct pci_dev *dev = bus->self;
288 285
289 if (!dev) { 286 if (pci_probe_only && dev &&
290 /* Root bus. */
291 u32 pci_mem_end;
292 u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
293 unsigned long end;
294
295 bus->resource[0] = hose->io_space;
296 bus->resource[1] = hose->mem_space;
297
298 /* Adjust hose mem_space limit to prevent PCI allocations
299 in the iommu windows. */
300 pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
301 end = hose->mem_space->start + pci_mem_end;
302 if (hose->mem_space->end > end)
303 hose->mem_space->end = end;
304 } else if (pci_probe_only &&
305 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { 287 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
306 pci_read_bridge_bases(bus); 288 pci_read_bridge_bases(bus);
307 pcibios_fixup_device_resources(dev, bus); 289 pcibios_fixup_device_resources(dev, bus);
@@ -414,13 +396,31 @@ void __init
414common_init_pci(void) 396common_init_pci(void)
415{ 397{
416 struct pci_controller *hose; 398 struct pci_controller *hose;
399 struct list_head resources;
417 struct pci_bus *bus; 400 struct pci_bus *bus;
418 int next_busno; 401 int next_busno;
419 int need_domain_info = 0; 402 int need_domain_info = 0;
403 u32 pci_mem_end;
404 u32 sg_base;
405 unsigned long end;
420 406
421 /* Scan all of the recorded PCI controllers. */ 407 /* Scan all of the recorded PCI controllers. */
422 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { 408 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
423 bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose); 409 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
410
411 /* Adjust hose mem_space limit to prevent PCI allocations
412 in the iommu windows. */
413 pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
414 end = hose->mem_space->start + pci_mem_end;
415 if (hose->mem_space->end > end)
416 hose->mem_space->end = end;
417
418 INIT_LIST_HEAD(&resources);
419 pci_add_resource(&resources, hose->io_space);
420 pci_add_resource(&resources, hose->mem_space);
421
422 bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
423 hose, &resources);
424 hose->bus = bus; 424 hose->bus = bus;
425 hose->need_domain_info = need_domain_info; 425 hose->need_domain_info = need_domain_info;
426 next_busno = bus->subordinate + 1; 426 next_busno = bus->subordinate + 1;