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authorMaciej W. Rozycki <macro@linux-mips.org>2008-05-21 17:09:11 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-08 03:12:53 -0400
commitd11d5794e0c21a1054e6cd57381050a999ad7232 (patch)
treef30e9f4acbfe8ed52be584c0599909ebfa33af4a /arch/.gitignore
parenta0176e2485ce6468f9b74264a2fd6c19811f027a (diff)
x86: I/O APIC: AEOI timer acknowledgement clean-ups
The code that used to be in do_slow_gettimeoffset() that relied on the IRR bit of the master 8259A PIC for IRQ0 to check the state of the output timer 0 of the PIT is no longer there. As a result, there is no need to use the POLL command to acknowledge the timer interrupt in the "8259A Virtual Wire", except for the NMI watchdog when the i82489DX APIC is used (this is because this particular APIC treats NMIs as level-triggered and keeping the input asserted would keep motherboard NMI sources held off for too long). Remove the unneeded bits and adjust comments accordingly. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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