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authorClemens Ladisch <clemens@ladisch.de>2010-03-17 06:07:55 -0400
committerStefan Richter <stefanr@s5r6.in-berlin.de>2010-03-17 18:24:42 -0400
commit8301b91ba0b2d15c86fdf5357efe7c04eb767a6e (patch)
tree618f6ef4d1b4a35bba74af004a0aabdde4f315e2 /REPORTING-BUGS
parentcf36df6bfb49fd265a39f676bfc9718029fef160 (diff)
firewire: ohci: add cycle timer quirk for the TI TSB12LV22
Among the many entries in the TSB12LV22 errata list (TI literature number SLLS312) is the following: PCI Slave reads of the Cycle Timer register may occasionally get an incorrect value. Software may be able to validate value by reading the register multiple times rapidly and evaluating for a reasonable difference. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> (untested) Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> (added #define)
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