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authorRandy Dunlap <randy.dunlap@oracle.com>2007-07-09 14:55:54 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-11 19:02:11 -0400
commit694625c0b322905d6892fad873029f764cd4823f (patch)
treec48ac2c0095f2ac4044bd12b27ea318eb6156c73 /Documentation
parentf5609d7e679db3f29433f56e1f2e397a2f815288 (diff)
PCI: add pci_try_set_mwi
As suggested by Andrew, add pci_try_set_mwi(), which does not require return-value checking. - add pci_try_set_mwi() without __must_check - make it return 0 on success, errno if the "try" failed or error - review callers Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/pci.txt5
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/pci.txt b/Documentation/pci.txt
index 7d3da30ff0b4..7754f5aea4e9 100644
--- a/Documentation/pci.txt
+++ b/Documentation/pci.txt
@@ -296,7 +296,10 @@ If the PCI device can use the PCI Memory-Write-Invalidate transaction,
296call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval 296call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval
297and also ensures that the cache line size register is set correctly. 297and also ensures that the cache line size register is set correctly.
298Check the return value of pci_set_mwi() as not all architectures 298Check the return value of pci_set_mwi() as not all architectures
299or chip-sets may support Memory-Write-Invalidate. 299or chip-sets may support Memory-Write-Invalidate. Alternatively,
300if Mem-Wr-Inval would be nice to have but is not required, call
301pci_try_set_mwi() to have the system do its best effort at enabling
302Mem-Wr-Inval.
300 303
301 304
3023.2 Request MMIO/IOP resources 3053.2 Request MMIO/IOP resources