diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2015-02-20 05:32:15 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-03-07 10:04:30 -0500 |
commit | bb02714fe5f198c0f07a8039ebcc636c1bffbc03 (patch) | |
tree | 856514cd728fc307fce37c2349bacdd3e3bc9f7b /Documentation | |
parent | 5cf4f68672856dcbca883b460aee4ee5bfbeafb0 (diff) |
ASoC: rsnd: add sample code of missing clocks
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/sound/renesas,rsnd.txt | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt index 87e0fc2ce399..503967ba39db 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt +++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt | |||
@@ -47,6 +47,27 @@ rcar_sound: rcar_sound@ec500000 { | |||
47 | <0 0xec540000 0 0x1000>, /* SSIU */ | 47 | <0 0xec540000 0 0x1000>, /* SSIU */ |
48 | <0 0xec541000 0 0x1280>; /* SSI */ | 48 | <0 0xec541000 0 0x1280>; /* SSI */ |
49 | 49 | ||
50 | clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>, | ||
51 | <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>, | ||
52 | <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>, | ||
53 | <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>, | ||
54 | <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>, | ||
55 | <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>, | ||
56 | <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>, | ||
57 | <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>, | ||
58 | <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>, | ||
59 | <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>, | ||
60 | <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>, | ||
61 | <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>, | ||
62 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; | ||
63 | clock-names = "ssi-all", | ||
64 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | ||
65 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", | ||
66 | "src.9", "src.8", "src.7", "src.6", "src.5", | ||
67 | "src.4", "src.3", "src.2", "src.1", "src.0", | ||
68 | "dvc.0", "dvc.1", | ||
69 | "clk_a", "clk_b", "clk_c", "clk_i"; | ||
70 | |||
50 | rcar_sound,dvc { | 71 | rcar_sound,dvc { |
51 | dvc0: dvc@0 { }; | 72 | dvc0: dvc@0 { }; |
52 | dvc1: dvc@1 { }; | 73 | dvc1: dvc@1 { }; |