diff options
| author | Johan Hovold <johan@kernel.org> | 2014-11-19 06:59:20 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-11-21 14:08:57 -0500 |
| commit | 6d01329444725a5c17cf75ba6c5c0c5e42843613 (patch) | |
| tree | 1e4025ecba1b33a5419a95717f74c259a6add275 /Documentation | |
| parent | 86dc1342bcbb1905b2ac9653a559b303f62bd728 (diff) | |
dt/bindings: reformat micrel eth-phy documentation
Reduce indentation of Micrel PHY binding documentations somewhat.
Also fix "reference input clock" typo while at it.
Cc: devicetree@vger.kernel.org
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/net/micrel.txt | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/net/micrel.txt b/Documentation/devicetree/bindings/net/micrel.txt index a1bab5eaae02..20a6cac7abc6 100644 --- a/Documentation/devicetree/bindings/net/micrel.txt +++ b/Documentation/devicetree/bindings/net/micrel.txt | |||
| @@ -6,21 +6,21 @@ Optional properties: | |||
| 6 | 6 | ||
| 7 | - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs. | 7 | - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs. |
| 8 | 8 | ||
| 9 | Configure the LED mode with single value. The list of PHYs and | 9 | Configure the LED mode with single value. The list of PHYs and the |
| 10 | the bits that are currently supported: | 10 | bits that are currently supported: |
| 11 | 11 | ||
| 12 | KSZ8001: register 0x1e, bits 15..14 | 12 | KSZ8001: register 0x1e, bits 15..14 |
| 13 | KSZ8041: register 0x1e, bits 15..14 | 13 | KSZ8041: register 0x1e, bits 15..14 |
| 14 | KSZ8021: register 0x1f, bits 5..4 | 14 | KSZ8021: register 0x1f, bits 5..4 |
| 15 | KSZ8031: register 0x1f, bits 5..4 | 15 | KSZ8031: register 0x1f, bits 5..4 |
| 16 | KSZ8051: register 0x1f, bits 5..4 | 16 | KSZ8051: register 0x1f, bits 5..4 |
| 17 | KSZ8081: register 0x1f, bits 5..4 | 17 | KSZ8081: register 0x1f, bits 5..4 |
| 18 | KSZ8091: register 0x1f, bits 5..4 | 18 | KSZ8091: register 0x1f, bits 5..4 |
| 19 | 19 | ||
| 20 | See the respective PHY datasheet for the mode values. | 20 | See the respective PHY datasheet for the mode values. |
| 21 | 21 | ||
| 22 | - clocks, clock-names: contains clocks according to the common clock bindings. | 22 | - clocks, clock-names: contains clocks according to the common clock bindings. |
| 23 | 23 | ||
| 24 | supported clocks: | 24 | supported clocks: |
| 25 | - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII | 25 | - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference |
| 26 | refence input clock. Used to determine the XI input clock. | 26 | input clock. Used to determine the XI input clock. |