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authorOlof Johansson <olof@lixom.net>2015-01-23 17:56:49 -0500
committerOlof Johansson <olof@lixom.net>2015-01-23 17:56:49 -0500
commit2e568f56c3572d13e3654c42f520f6f731a42a3f (patch)
tree0a48fa85c3262a708482a0aa15c3d47d12e0d8b0 /Documentation
parentff3a45b6185d734e7eb3aee6f01d93ad773935e3 (diff)
parentd035fdfa27ac124bc8f94c3d7dc82ad069802170 (diff)
Merge tag 'tegra-for-3.20-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/arm64
Merge "arm64: Add initial Tegra support" from Thierry Reding: This adds support for the Tegra132 SoC, which is essentially a Tegra124 with a dual Denver CPU complex instead of the quad-Cortex-A15. There is not much here, only the Kconfig entries, but it will allow us to more easily get subsequent patches in (many of which have already been sent for review). * tag 'tegra-for-3.20-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: Add Tegra132 support soc: tegra: Add thermal reset (thermtrip) support to PMC ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree of: Add descriptions of thermtrip properties to Tegra PMC bindings soc/tegra: pmc: Add Tegra132 support soc/tegra: fuse: Add Tegra132 support soc/tegra: fuse: Constify tegra_fuse_info structures soc/tegra: Add Tegra132 support clocksource: Build Tegra timer on 32-bit ARM only soc/tegra: pmc: restrict compilation of suspend-related support to ARM Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt26
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 68ac65f82a1c..2fd50511ab4b 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -47,6 +47,23 @@ Required properties when nvidia,suspend-mode=<0>:
47 sleep mode, the warm boot code will restore some PLLs, clocks and then 47 sleep mode, the warm boot code will restore some PLLs, clocks and then
48 bring up CPU0 for resuming the system. 48 bring up CPU0 for resuming the system.
49 49
50Hardware-triggered thermal reset:
51On Tegra30, Tegra114 and Tegra124, if the 'i2c-thermtrip' subnode exists,
52hardware-triggered thermal reset will be enabled.
53
54Required properties for hardware-triggered thermal reset (inside 'i2c-thermtrip'):
55- nvidia,i2c-controller-id : ID of I2C controller to send poweroff command to. Valid values are
56 described in section 9.2.148 "APBDEV_PMC_SCRATCH53_0" of the
57 Tegra K1 Technical Reference Manual.
58- nvidia,bus-addr : Bus address of the PMU on the I2C bus
59- nvidia,reg-addr : I2C register address to write poweroff command to
60- nvidia,reg-data : Poweroff command to write to PMU
61
62Optional properties for hardware-triggered thermal reset (inside 'i2c-thermtrip'):
63- nvidia,pinmux-id : Pinmux used by the hardware when issuing poweroff command.
64 Defaults to 0. Valid values are described in section 12.5.2
65 "Pinmux Support" of the Tegra4 Technical Reference Manual.
66
50Example: 67Example:
51 68
52/ SoC dts including file 69/ SoC dts including file
@@ -69,6 +86,15 @@ pmc@7000f400 {
69/ Tegra board dts file 86/ Tegra board dts file
70{ 87{
71 ... 88 ...
89 pmc@7000f400 {
90 i2c-thermtrip {
91 nvidia,i2c-controller-id = <4>;
92 nvidia,bus-addr = <0x40>;
93 nvidia,reg-addr = <0x36>;
94 nvidia,reg-data = <0x2>;
95 };
96 };
97 ...
72 clocks { 98 clocks {
73 compatible = "simple-bus"; 99 compatible = "simple-bus";
74 #address-cells = <1>; 100 #address-cells = <1>;