diff options
author | Huang Shijie <b32955@freescale.com> | 2014-02-24 05:37:41 -0500 |
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committer | Brian Norris <computersforpeace@gmail.com> | 2014-04-14 14:22:58 -0400 |
commit | c7a8a11c6bb78f49895d42294a88002ea544922f (patch) | |
tree | f4cf46963843e1e4de247e22578eceffb974384e /Documentation | |
parent | 0d8c11c01274bde227d368daa8954911dd324a9f (diff) |
Documentation: add the binding file for Freescale QuadSPI driver
This patch adds the binding file for Freescale QuadSPI driver.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/mtd/fsl-quadspi.txt | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt new file mode 100644 index 000000000000..823d13412195 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt | |||
@@ -0,0 +1,35 @@ | |||
1 | * Freescale Quad Serial Peripheral Interface(QuadSPI) | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : Should be "fsl,vf610-qspi" | ||
5 | - reg : the first contains the register location and length, | ||
6 | the second contains the memory mapping address and length | ||
7 | - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory" | ||
8 | - interrupts : Should contain the interrupt for the device | ||
9 | - clocks : The clocks needed by the QuadSPI controller | ||
10 | - clock-names : the name of the clocks | ||
11 | |||
12 | Optional properties: | ||
13 | - fsl,qspi-has-second-chip: The controller has two buses, bus A and bus B. | ||
14 | Each bus can be connected with two NOR flashes. | ||
15 | Most of the time, each bus only has one NOR flash | ||
16 | connected, this is the default case. | ||
17 | But if there are two NOR flashes connected to the | ||
18 | bus, you should enable this property. | ||
19 | (Please check the board's schematic.) | ||
20 | |||
21 | Example: | ||
22 | |||
23 | qspi0: quadspi@40044000 { | ||
24 | compatible = "fsl,vf610-qspi"; | ||
25 | reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; | ||
26 | reg-names = "QuadSPI", "QuadSPI-memory"; | ||
27 | interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; | ||
28 | clocks = <&clks VF610_CLK_QSPI0_EN>, | ||
29 | <&clks VF610_CLK_QSPI0>; | ||
30 | clock-names = "qspi_en", "qspi"; | ||
31 | |||
32 | flash0: s25fl128s@0 { | ||
33 | .... | ||
34 | }; | ||
35 | }; | ||