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authorChristian Ruppert <christian.ruppert@abilis.com>2013-06-25 12:29:57 -0400
committerThomas Gleixner <tglx@linutronix.de>2013-06-25 12:54:21 -0400
commitb06eb0173ef1d9366d14b4ca3e8e38dc72b03e8b (patch)
tree5b990876916e837233d00d3cd000052681bd57a8 /Documentation
parentfbab62c5cd57a6acd9ed80903532c86897d2d560 (diff)
irqchip: Add TB10x interrupt controller driver
The SOC interrupt controller driver for the Abilis Systems TB10x series of SOCs based on ARC700 CPUs. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: devicetree-discuss@lists.ozlabs.org Link: http://lkml.kernel.org/r/1372177797-9458-1-git-send-email-christian.ruppert@abilis.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt38
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diff --git a/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt
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1TB10x Top Level Interrupt Controller
2====================================
3
4The Abilis TB10x SOC contains a custom interrupt controller. It performs
5one-to-one mapping of external interrupt sources to CPU interrupts and
6provides support for reconfigurable trigger modes.
7
8Required properties
9-------------------
10
11- compatible: Should be "abilis,tb10x-ictl"
12- reg: specifies physical base address and size of register range.
13- interrupt-congroller: Identifies the node as an interrupt controller.
14- #interrupt cells: Specifies the number of cells used to encode an interrupt
15 source connected to this controller. The value shall be 2.
16- interrupt-parent: Specifies the parent interrupt controller.
17- interrupts: Specifies the list of interrupt lines which are handled by
18 the interrupt controller in the parent controller's notation. Interrupts
19 are mapped one-to-one to parent interrupts.
20
21Example
22-------
23
24intc: interrupt-controller { /* Parent interrupt controller */
25 interrupt-controller;
26 #interrupt-cells = <1>; /* For example below */
27 /* ... */
28};
29
30tb10x_ictl: pic@2000 { /* TB10x interrupt controller */
31 compatible = "abilis,tb10x-ictl";
32 reg = <0x2000 0x20>;
33 interrupt-controller;
34 #interrupt-cells = <2>;
35 interrupt-parent = <&intc>;
36 interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
37 20 21 22 23 24 25 26 27 28 29 30 31>;
38};