diff options
author | Tiejun Chen <tiejun.chen@intel.com> | 2014-10-10 21:19:54 -0400 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-11-03 06:07:27 -0500 |
commit | 91690bf32ee12a85caf497ec01cfb47c0b298bac (patch) | |
tree | 1522322ff6252ece816cce64ee5d01058cd7036c /Documentation | |
parent | 16f8a6f9798ab9a1fd593b06b78925d02525ab81 (diff) |
Documentation: virtual: kvm: correct one bit description in APF case
When commit 6adba5274206 (KVM: Let host know whether the guest can
handle async PF in non-userspace context.) is introduced, actually
bit 2 still is reserved and should be zero. Instead, bit 1 is 1 to
indicate if asynchronous page faults can be injected when vcpu is
in cpl == 0, and also please see this,
in the file kvm_para.h, #define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1).
Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/virtual/kvm/msr.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/virtual/kvm/msr.txt b/Documentation/virtual/kvm/msr.txt index 6d470ae7b073..2a71c8f29f68 100644 --- a/Documentation/virtual/kvm/msr.txt +++ b/Documentation/virtual/kvm/msr.txt | |||
@@ -168,7 +168,7 @@ MSR_KVM_ASYNC_PF_EN: 0x4b564d02 | |||
168 | 64 byte memory area which must be in guest RAM and must be | 168 | 64 byte memory area which must be in guest RAM and must be |
169 | zeroed. Bits 5-2 are reserved and should be zero. Bit 0 is 1 | 169 | zeroed. Bits 5-2 are reserved and should be zero. Bit 0 is 1 |
170 | when asynchronous page faults are enabled on the vcpu 0 when | 170 | when asynchronous page faults are enabled on the vcpu 0 when |
171 | disabled. Bit 2 is 1 if asynchronous page faults can be injected | 171 | disabled. Bit 1 is 1 if asynchronous page faults can be injected |
172 | when vcpu is in cpl == 0. | 172 | when vcpu is in cpl == 0. |
173 | 173 | ||
174 | First 4 byte of 64 byte memory location will be written to by | 174 | First 4 byte of 64 byte memory location will be written to by |