diff options
author | Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2014-11-18 03:46:59 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-11-19 15:04:57 -0500 |
commit | 233b36cf1f83ef4a7b3670ffa5eeac1ed9d41889 (patch) | |
tree | a04c52e8c2a7ca41c327ca77ea44e8764bdfa8a8 /Documentation | |
parent | 355a901e6cf1b2b763ec85caa2a9f04fbcc4ab4a (diff) |
stmmac: update driver documentation
Recently many changes have been done inside the driver
so this patch updates the driver's doc for example reviewing
information for the rx and tx processes that are managed
by napi method, adding new information for missing glue-logic files
etc.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/networking/stmmac.txt | 132 |
1 files changed, 65 insertions, 67 deletions
diff --git a/Documentation/networking/stmmac.txt b/Documentation/networking/stmmac.txt index 2090895b08d4..e655e2453c98 100644 --- a/Documentation/networking/stmmac.txt +++ b/Documentation/networking/stmmac.txt | |||
@@ -1,12 +1,12 @@ | |||
1 | STMicroelectronics 10/100/1000 Synopsys Ethernet driver | 1 | STMicroelectronics 10/100/1000 Synopsys Ethernet driver |
2 | 2 | ||
3 | Copyright (C) 2007-2013 STMicroelectronics Ltd | 3 | Copyright (C) 2007-2014 STMicroelectronics Ltd |
4 | Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> | 4 | Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> |
5 | 5 | ||
6 | This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers | 6 | This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers |
7 | (Synopsys IP blocks). | 7 | (Synopsys IP blocks). |
8 | 8 | ||
9 | Currently this network device driver is for all STM embedded MAC/GMAC | 9 | Currently this network device driver is for all STi embedded MAC/GMAC |
10 | (i.e. 7xxx/5xxx SoCs), SPEAr (arm), Loongson1B (mips) and XLINX XC2V3000 | 10 | (i.e. 7xxx/5xxx SoCs), SPEAr (arm), Loongson1B (mips) and XLINX XC2V3000 |
11 | FF1152AMT0221 D1215994A VIRTEX FPGA board. | 11 | FF1152AMT0221 D1215994A VIRTEX FPGA board. |
12 | 12 | ||
@@ -22,6 +22,9 @@ The kernel configuration option is STMMAC_ETH: | |||
22 | Device Drivers ---> Network device support ---> Ethernet (1000 Mbit) ---> | 22 | Device Drivers ---> Network device support ---> Ethernet (1000 Mbit) ---> |
23 | STMicroelectronics 10/100/1000 Ethernet driver (STMMAC_ETH) | 23 | STMicroelectronics 10/100/1000 Ethernet driver (STMMAC_ETH) |
24 | 24 | ||
25 | CONFIG_STMMAC_PLATFORM: is to enable the platform driver. | ||
26 | CONFIG_STMMAC_PCI: is to enable the pci driver. | ||
27 | |||
25 | 2) Driver parameters list: | 28 | 2) Driver parameters list: |
26 | debug: message level (0: no output, 16: all); | 29 | debug: message level (0: no output, 16: all); |
27 | phyaddr: to manually provide the physical address to the PHY device; | 30 | phyaddr: to manually provide the physical address to the PHY device; |
@@ -45,10 +48,11 @@ Driver parameters can be also passed in command line by using: | |||
45 | The xmit method is invoked when the kernel needs to transmit a packet; it sets | 48 | The xmit method is invoked when the kernel needs to transmit a packet; it sets |
46 | the descriptors in the ring and informs the DMA engine that there is a packet | 49 | the descriptors in the ring and informs the DMA engine that there is a packet |
47 | ready to be transmitted. | 50 | ready to be transmitted. |
48 | Once the controller has finished transmitting the packet, an interrupt is | ||
49 | triggered; So the driver will be able to release the socket buffers. | ||
50 | By default, the driver sets the NETIF_F_SG bit in the features field of the | 51 | By default, the driver sets the NETIF_F_SG bit in the features field of the |
51 | net_device structure enabling the scatter/gather feature. | 52 | net_device structure enabling the scatter-gather feature. This is true on |
53 | chips and configurations where the checksum can be done in hardware. | ||
54 | Once the controller has finished transmitting the packet, napi will be | ||
55 | scheduled to release the transmit resources. | ||
52 | 56 | ||
53 | 4.2) Receive process | 57 | 4.2) Receive process |
54 | When one or more packets are received, an interrupt happens. The interrupts | 58 | When one or more packets are received, an interrupt happens. The interrupts |
@@ -58,20 +62,12 @@ This is based on NAPI so the interrupt handler signals only if there is work | |||
58 | to be done, and it exits. | 62 | to be done, and it exits. |
59 | Then the poll method will be scheduled at some future point. | 63 | Then the poll method will be scheduled at some future point. |
60 | The incoming packets are stored, by the DMA, in a list of pre-allocated socket | 64 | The incoming packets are stored, by the DMA, in a list of pre-allocated socket |
61 | buffers in order to avoid the memcpy (Zero-copy). | 65 | buffers in order to avoid the memcpy (zero-copy). |
62 | 66 | ||
63 | 4.3) Interrupt Mitigation | 67 | 4.3) Interrupt Mitigation |
64 | The driver is able to mitigate the number of its DMA interrupts | 68 | The driver is able to mitigate the number of its DMA interrupts |
65 | using NAPI for the reception on chips older than the 3.50. | 69 | using NAPI for the reception on chips older than the 3.50. |
66 | New chips have an HW RX-Watchdog used for this mitigation. | 70 | New chips have an HW RX-Watchdog used for this mitigation. |
67 | |||
68 | On Tx-side, the mitigation schema is based on a SW timer that calls the | ||
69 | tx function (stmmac_tx) to reclaim the resource after transmitting the | ||
70 | frames. | ||
71 | Also there is another parameter (like a threshold) used to program | ||
72 | the descriptors avoiding to set the interrupt on completion bit in | ||
73 | when the frame is sent (xmit). | ||
74 | |||
75 | Mitigation parameters can be tuned by ethtool. | 71 | Mitigation parameters can be tuned by ethtool. |
76 | 72 | ||
77 | 4.4) WOL | 73 | 4.4) WOL |
@@ -79,7 +75,7 @@ Wake up on Lan feature through Magic and Unicast frames are supported for the | |||
79 | GMAC core. | 75 | GMAC core. |
80 | 76 | ||
81 | 4.5) DMA descriptors | 77 | 4.5) DMA descriptors |
82 | Driver handles both normal and enhanced descriptors. The latter has been only | 78 | Driver handles both normal and alternate descriptors. The latter has been only |
83 | tested on DWC Ether MAC 10/100/1000 Universal version 3.41a and later. | 79 | tested on DWC Ether MAC 10/100/1000 Universal version 3.41a and later. |
84 | 80 | ||
85 | STMMAC supports DMA descriptor to operate both in dual buffer (RING) | 81 | STMMAC supports DMA descriptor to operate both in dual buffer (RING) |
@@ -91,9 +87,20 @@ In CHAINED mode each descriptor will have pointer to next descriptor in | |||
91 | the list, hence creating the explicit chaining in the descriptor itself, | 87 | the list, hence creating the explicit chaining in the descriptor itself, |
92 | whereas such explicit chaining is not possible in RING mode. | 88 | whereas such explicit chaining is not possible in RING mode. |
93 | 89 | ||
90 | 4.5.1) Extended descriptors | ||
91 | The extended descriptors give us information about the Ethernet payload | ||
92 | when it is carrying PTP packets or TCP/UDP/ICMP over IP. | ||
93 | These are not available on GMAC Synopsys chips older than the 3.50. | ||
94 | At probe time the driver will decide if these can be actually used. | ||
95 | This support also is mandatory for PTPv2 because the extra descriptors | ||
96 | are used for saving the hardware timestamps and Extended Status. | ||
97 | |||
94 | 4.6) Ethtool support | 98 | 4.6) Ethtool support |
95 | Ethtool is supported. Driver statistics and internal errors can be taken using: | 99 | Ethtool is supported. |
96 | ethtool -S ethX command. It is possible to dump registers etc. | 100 | |
101 | For example, driver statistics (including RMON), internal errors can be taken | ||
102 | using: | ||
103 | # ethtool -S ethX command | ||
97 | 104 | ||
98 | 4.7) Jumbo and Segmentation Offloading | 105 | 4.7) Jumbo and Segmentation Offloading |
99 | Jumbo frames are supported and tested for the GMAC. | 106 | Jumbo frames are supported and tested for the GMAC. |
@@ -101,12 +108,11 @@ The GSO has been also added but it's performed in software. | |||
101 | LRO is not supported. | 108 | LRO is not supported. |
102 | 109 | ||
103 | 4.8) Physical | 110 | 4.8) Physical |
104 | The driver is compatible with PAL to work with PHY and GPHY devices. | 111 | The driver is compatible with Physical Abstraction Layer to be connected with |
112 | PHY and GPHY devices. | ||
105 | 113 | ||
106 | 4.9) Platform information | 114 | 4.9) Platform information |
107 | Several driver's information can be passed through the platform | 115 | Several information can be passed through the platform and device-tree. |
108 | These are included in the include/linux/stmmac.h header file | ||
109 | and detailed below as well: | ||
110 | 116 | ||
111 | struct plat_stmmacenet_data { | 117 | struct plat_stmmacenet_data { |
112 | char *phy_bus_name; | 118 | char *phy_bus_name; |
@@ -125,15 +131,18 @@ struct plat_stmmacenet_data { | |||
125 | int force_sf_dma_mode; | 131 | int force_sf_dma_mode; |
126 | int force_thresh_dma_mode; | 132 | int force_thresh_dma_mode; |
127 | int riwt_off; | 133 | int riwt_off; |
134 | int max_speed; | ||
135 | int maxmtu; | ||
128 | void (*fix_mac_speed)(void *priv, unsigned int speed); | 136 | void (*fix_mac_speed)(void *priv, unsigned int speed); |
129 | void (*bus_setup)(void __iomem *ioaddr); | 137 | void (*bus_setup)(void __iomem *ioaddr); |
130 | void *(*setup)(struct platform_device *pdev); | 138 | void *(*setup)(struct platform_device *pdev); |
139 | void (*free)(struct platform_device *pdev, void *priv); | ||
131 | int (*init)(struct platform_device *pdev, void *priv); | 140 | int (*init)(struct platform_device *pdev, void *priv); |
132 | void (*exit)(struct platform_device *pdev, void *priv); | 141 | void (*exit)(struct platform_device *pdev, void *priv); |
133 | void *custom_cfg; | 142 | void *custom_cfg; |
134 | void *custom_data; | 143 | void *custom_data; |
135 | void *bsp_priv; | 144 | void *bsp_priv; |
136 | }; | 145 | }; |
137 | 146 | ||
138 | Where: | 147 | Where: |
139 | o phy_bus_name: phy bus name to attach to the stmmac. | 148 | o phy_bus_name: phy bus name to attach to the stmmac. |
@@ -258,32 +267,43 @@ and the second one, with a real PHY device attached to the bus, | |||
258 | by using the stmmac_mdio_bus_data structure (to provide the id, the | 267 | by using the stmmac_mdio_bus_data structure (to provide the id, the |
259 | reset procedure etc). | 268 | reset procedure etc). |
260 | 269 | ||
261 | 4.10) List of source files: | 270 | Note that, starting from new chips, where it is available the HW capability |
262 | o Kconfig | 271 | register, many configurations are discovered at run-time for example to |
263 | o Makefile | 272 | understand if EEE, HW csum, PTP, enhanced descriptor etc are actually |
264 | o stmmac_main.c: main network device driver; | 273 | available. As strategy adopted in this driver, the information from the HW |
265 | o stmmac_mdio.c: mdio functions; | 274 | capability register can replace what has been passed from the platform. |
266 | o stmmac_pci: PCI driver; | 275 | |
267 | o stmmac_platform.c: platform driver | 276 | 4.10) Device-tree support. |
268 | o stmmac_ethtool.c: ethtool support; | 277 | |
269 | o stmmac_timer.[ch]: timer code used for mitigating the driver dma interrupts | 278 | Please see the following document: |
270 | (only tested on ST40 platforms based); | 279 | Documentation/devicetree/bindings/net/stmmac.txt |
280 | |||
281 | and the stmmac_of_data structure inside the include/linux/stmmac.h header file. | ||
282 | |||
283 | 4.11) This is a summary of the content of some relevant files: | ||
284 | o stmmac_main.c: to implement the main network device driver; | ||
285 | o stmmac_mdio.c: to provide mdio functions; | ||
286 | o stmmac_pci: this the PCI driver; | ||
287 | o stmmac_platform.c: this the platform driver (OF supported) | ||
288 | o stmmac_ethtool.c: to implement the ethtool support; | ||
271 | o stmmac.h: private driver structure; | 289 | o stmmac.h: private driver structure; |
272 | o common.h: common definitions and VFTs; | 290 | o common.h: common definitions and VFTs; |
273 | o descs.h: descriptor structure definitions; | 291 | o descs.h: descriptor structure definitions; |
274 | o dwmac1000_core.c: GMAC core functions; | 292 | o dwmac1000_core.c: dwmac GiGa core functions; |
275 | o dwmac1000_dma.c: dma functions for the GMAC chip; | 293 | o dwmac1000_dma.c: dma functions for the GMAC chip; |
276 | o dwmac1000.h: specific header file for the GMAC; | 294 | o dwmac1000.h: specific header file for the dwmac GiGa; |
277 | o dwmac100_core: MAC 100 core and dma code; | 295 | o dwmac100_core: dwmac 100 core code; |
278 | o dwmac100_dma.c: dma functions for the MAC chip; | 296 | o dwmac100_dma.c: dma functions for the dwmac 100 chip; |
279 | o dwmac1000.h: specific header file for the MAC; | 297 | o dwmac1000.h: specific header file for the MAC; |
280 | o dwmac_lib.c: generic DMA functions shared among chips; | 298 | o dwmac_lib.c: generic DMA functions; |
281 | o enh_desc.c: functions for handling enhanced descriptors; | 299 | o enh_desc.c: functions for handling enhanced descriptors; |
282 | o norm_desc.c: functions for handling normal descriptors; | 300 | o norm_desc.c: functions for handling normal descriptors; |
283 | o chain_mode.c/ring_mode.c:: functions to manage RING/CHAINED modes; | 301 | o chain_mode.c/ring_mode.c:: functions to manage RING/CHAINED modes; |
284 | o mmc_core.c/mmc.h: Management MAC Counters; | 302 | o mmc_core.c/mmc.h: Management MAC Counters; |
285 | o stmmac_hwtstamp.c: HW timestamp support for PTP | 303 | o stmmac_hwtstamp.c: HW timestamp support for PTP; |
286 | o stmmac_ptp.c: PTP 1588 clock | 304 | o stmmac_ptp.c: PTP 1588 clock; |
305 | o dwmac-<XXX>.c: these are for the platform glue-logic file; e.g. dwmac-sti.c | ||
306 | for STMicroelectronics SoCs. | ||
287 | 307 | ||
288 | 5) Debug Information | 308 | 5) Debug Information |
289 | 309 | ||
@@ -298,23 +318,14 @@ to get statistics: e.g. using: ethtool -S ethX | |||
298 | (that shows the Management counters (MMC) if supported) | 318 | (that shows the Management counters (MMC) if supported) |
299 | or sees the MAC/DMA registers: e.g. using: ethtool -d ethX | 319 | or sees the MAC/DMA registers: e.g. using: ethtool -d ethX |
300 | 320 | ||
301 | Compiling the Kernel with CONFIG_DEBUG_FS and enabling the | 321 | Compiling the Kernel with CONFIG_DEBUG_FS the driver will export the following |
302 | STMMAC_DEBUG_FS option the driver will export the following | ||
303 | debugfs entries: | 322 | debugfs entries: |
304 | 323 | ||
305 | /sys/kernel/debug/stmmaceth/descriptors_status | 324 | /sys/kernel/debug/stmmaceth/descriptors_status |
306 | To show the DMA TX/RX descriptor rings | 325 | To show the DMA TX/RX descriptor rings |
307 | 326 | ||
308 | Developer can also use the "debug" module parameter to get | 327 | Developer can also use the "debug" module parameter to get further debug |
309 | further debug information. | 328 | information (please see: NETIF Msg Level). |
310 | |||
311 | In the end, there are other macros (that cannot be enabled | ||
312 | via menuconfig) to turn-on the RX/TX DMA debugging, | ||
313 | specific MAC core debug printk etc. Others to enable the | ||
314 | debug in the TX and RX processes. | ||
315 | All these are only useful during the developing stage | ||
316 | and should never enabled inside the code for general usage. | ||
317 | In fact, these can generate an huge amount of debug messages. | ||
318 | 329 | ||
319 | 6) Energy Efficient Ethernet | 330 | 6) Energy Efficient Ethernet |
320 | 331 | ||
@@ -337,15 +348,7 @@ To enter in Tx LPI mode the driver needs to have a software timer | |||
337 | that enable and disable the LPI mode when there is nothing to be | 348 | that enable and disable the LPI mode when there is nothing to be |
338 | transmitted. | 349 | transmitted. |
339 | 350 | ||
340 | 7) Extended descriptors | 351 | 7) Precision Time Protocol (PTP) |
341 | The extended descriptors give us information about the receive Ethernet payload | ||
342 | when it is carrying PTP packets or TCP/UDP/ICMP over IP. | ||
343 | These are not available on GMAC Synopsys chips older than the 3.50. | ||
344 | At probe time the driver will decide if these can be actually used. | ||
345 | This support also is mandatory for PTPv2 because the extra descriptors 6 and 7 | ||
346 | are used for saving the hardware timestamps. | ||
347 | |||
348 | 8) Precision Time Protocol (PTP) | ||
349 | The driver supports the IEEE 1588-2002, Precision Time Protocol (PTP), | 352 | The driver supports the IEEE 1588-2002, Precision Time Protocol (PTP), |
350 | which enables precise synchronization of clocks in measurement and | 353 | which enables precise synchronization of clocks in measurement and |
351 | control systems implemented with technologies such as network | 354 | control systems implemented with technologies such as network |
@@ -355,7 +358,7 @@ In addition to the basic timestamp features mentioned in IEEE 1588-2002 | |||
355 | Timestamps, new GMAC cores support the advanced timestamp features. | 358 | Timestamps, new GMAC cores support the advanced timestamp features. |
356 | IEEE 1588-2008 that can be enabled when configure the Kernel. | 359 | IEEE 1588-2008 that can be enabled when configure the Kernel. |
357 | 360 | ||
358 | 9) SGMII/RGMII supports | 361 | 8) SGMII/RGMII supports |
359 | New GMAC devices provide own way to manage RGMII/SGMII. | 362 | New GMAC devices provide own way to manage RGMII/SGMII. |
360 | This information is available at run-time by looking at the | 363 | This information is available at run-time by looking at the |
361 | HW capability register. This means that the stmmac can manage | 364 | HW capability register. This means that the stmmac can manage |
@@ -364,8 +367,3 @@ In fact, the HW provides a subset of extended registers to | |||
364 | restart the ANE, verify Full/Half duplex mode and Speed. | 367 | restart the ANE, verify Full/Half duplex mode and Speed. |
365 | Also thanks to these registers it is possible to look at the | 368 | Also thanks to these registers it is possible to look at the |
366 | Auto-negotiated Link Parter Ability. | 369 | Auto-negotiated Link Parter Ability. |
367 | |||
368 | 10) TODO: | ||
369 | o XGMAC is not supported. | ||
370 | o Complete the TBI & RTBI support. | ||
371 | o extend VLAN support for 3.70a SYNP GMAC. | ||