diff options
author | Marian Balakowicz <m8@semihalf.com> | 2007-10-18 14:44:24 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2007-10-21 14:42:55 -0400 |
commit | d24bc314c964e900ddf30efa1ef44565cf0cf44c (patch) | |
tree | ee79394490a55998b355ea63acee96d14821a37a /Documentation | |
parent | c5c01c9700e59a5b20d7bdd15808d33ab9d9e877 (diff) |
[POWERPC] Update device tree binding for mpc5200 gpt
Add 'fsl,' prefix to 'compatible' property for gpt nodes.
Add 'fsl,' prefix to empty, GPT0 specific 'has-wdt' property.
The fsl, prefix is being added to better match the convention of prefixing
manufacturer specific properties and values with the vendors name.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/powerpc/mpc52xx-device-tree-bindings.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt index 5f7d536cb0c6..5e03610e186f 100644 --- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt +++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt | |||
@@ -185,7 +185,7 @@ bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires | |||
185 | Recommended soc5200 child nodes; populate as needed for your board | 185 | Recommended soc5200 child nodes; populate as needed for your board |
186 | name device_type compatible Description | 186 | name device_type compatible Description |
187 | ---- ----------- ---------- ----------- | 187 | ---- ----------- ---------- ----------- |
188 | gpt@<addr> gpt mpc5200-gpt General purpose timers | 188 | gpt@<addr> gpt fsl,mpc5200-gpt General purpose timers |
189 | rtc@<addr> rtc mpc5200-rtc Real time clock | 189 | rtc@<addr> rtc mpc5200-rtc Real time clock |
190 | mscan@<addr> mscan mpc5200-mscan CAN bus controller | 190 | mscan@<addr> mscan mpc5200-mscan CAN bus controller |
191 | pci@<addr> pci mpc5200-pci PCI bridge | 191 | pci@<addr> pci mpc5200-pci PCI bridge |
@@ -213,7 +213,7 @@ cell-index int When multiple devices are present, is the | |||
213 | 5) General Purpose Timer nodes (child of soc5200 node) | 213 | 5) General Purpose Timer nodes (child of soc5200 node) |
214 | On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board | 214 | On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board |
215 | design supports the internal wdt, then the device node for GPT0 should | 215 | design supports the internal wdt, then the device node for GPT0 should |
216 | include the empty property 'has-wdt'. | 216 | include the empty property 'fsl,has-wdt'. |
217 | 217 | ||
218 | 6) PSC nodes (child of soc5200 node) | 218 | 6) PSC nodes (child of soc5200 node) |
219 | PSC nodes can define the optional 'port-number' property to force assignment | 219 | PSC nodes can define the optional 'port-number' property to force assignment |