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authorRob Landley <rob@landley.net>2008-02-07 03:13:28 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-07 11:42:16 -0500
commitaa9128f303ddf4fddbeec199163825b67135edf6 (patch)
treedc6666c98bbb51a2e48dfd47aec6ed782a83c1cd /Documentation
parent3dddbfc30106280d98a5752b6c622f65e5eb3663 (diff)
Add missing section IDs to genericirq.tmpl
Add missing section IDs to genericirq.tmpl Signed-off-by: Rob Landley <rob@landley.net> Cc: "Randy.Dunlap" <rdunlap@xenotime.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/DocBook/genericirq.tmpl26
1 files changed, 13 insertions, 13 deletions
diff --git a/Documentation/DocBook/genericirq.tmpl b/Documentation/DocBook/genericirq.tmpl
index 4215f69ce7e6..3a882d9a90a9 100644
--- a/Documentation/DocBook/genericirq.tmpl
+++ b/Documentation/DocBook/genericirq.tmpl
@@ -172,7 +172,7 @@
172 <listitem><para>Chiplevel hardware encapsulation</para></listitem> 172 <listitem><para>Chiplevel hardware encapsulation</para></listitem>
173 </orderedlist> 173 </orderedlist>
174 </para> 174 </para>
175 <sect1> 175 <sect1 id="Interrupt_control_flow">
176 <title>Interrupt control flow</title> 176 <title>Interrupt control flow</title>
177 <para> 177 <para>
178 Each interrupt is described by an interrupt descriptor structure 178 Each interrupt is described by an interrupt descriptor structure
@@ -190,7 +190,7 @@
190 referenced by the assigned chip descriptor structure. 190 referenced by the assigned chip descriptor structure.
191 </para> 191 </para>
192 </sect1> 192 </sect1>
193 <sect1> 193 <sect1 id="Highlevel_Driver_API">
194 <title>Highlevel Driver API</title> 194 <title>Highlevel Driver API</title>
195 <para> 195 <para>
196 The highlevel Driver API consists of following functions: 196 The highlevel Driver API consists of following functions:
@@ -210,7 +210,7 @@
210 See the autogenerated function documentation for details. 210 See the autogenerated function documentation for details.
211 </para> 211 </para>
212 </sect1> 212 </sect1>
213 <sect1> 213 <sect1 id="Highlevel_IRQ_flow_handlers">
214 <title>Highlevel IRQ flow handlers</title> 214 <title>Highlevel IRQ flow handlers</title>
215 <para> 215 <para>
216 The generic layer provides a set of pre-defined irq-flow methods: 216 The generic layer provides a set of pre-defined irq-flow methods:
@@ -224,9 +224,9 @@
224 specific) are assigned to specific interrupts by the architecture 224 specific) are assigned to specific interrupts by the architecture
225 either during bootup or during device initialization. 225 either during bootup or during device initialization.
226 </para> 226 </para>
227 <sect2> 227 <sect2 id="Default_flow_implementations">
228 <title>Default flow implementations</title> 228 <title>Default flow implementations</title>
229 <sect3> 229 <sect3 id="Helper_functions">
230 <title>Helper functions</title> 230 <title>Helper functions</title>
231 <para> 231 <para>
232 The helper functions call the chip primitives and 232 The helper functions call the chip primitives and
@@ -267,9 +267,9 @@ noop(irq)
267 </para> 267 </para>
268 </sect3> 268 </sect3>
269 </sect2> 269 </sect2>
270 <sect2> 270 <sect2 id="Default_flow_handler_implementations">
271 <title>Default flow handler implementations</title> 271 <title>Default flow handler implementations</title>
272 <sect3> 272 <sect3 id="Default_Level_IRQ_flow_handler">
273 <title>Default Level IRQ flow handler</title> 273 <title>Default Level IRQ flow handler</title>
274 <para> 274 <para>
275 handle_level_irq provides a generic implementation 275 handle_level_irq provides a generic implementation
@@ -284,7 +284,7 @@ desc->chip->end();
284 </programlisting> 284 </programlisting>
285 </para> 285 </para>
286 </sect3> 286 </sect3>
287 <sect3> 287 <sect3 id="Default_Edge_IRQ_flow_handler">
288 <title>Default Edge IRQ flow handler</title> 288 <title>Default Edge IRQ flow handler</title>
289 <para> 289 <para>
290 handle_edge_irq provides a generic implementation 290 handle_edge_irq provides a generic implementation
@@ -311,7 +311,7 @@ desc->chip->end();
311 </programlisting> 311 </programlisting>
312 </para> 312 </para>
313 </sect3> 313 </sect3>
314 <sect3> 314 <sect3 id="Default_simple_IRQ_flow_handler">
315 <title>Default simple IRQ flow handler</title> 315 <title>Default simple IRQ flow handler</title>
316 <para> 316 <para>
317 handle_simple_irq provides a generic implementation 317 handle_simple_irq provides a generic implementation
@@ -328,7 +328,7 @@ handle_IRQ_event(desc->action);
328 </programlisting> 328 </programlisting>
329 </para> 329 </para>
330 </sect3> 330 </sect3>
331 <sect3> 331 <sect3 id="Default_per_CPU_flow_handler">
332 <title>Default per CPU flow handler</title> 332 <title>Default per CPU flow handler</title>
333 <para> 333 <para>
334 handle_percpu_irq provides a generic implementation 334 handle_percpu_irq provides a generic implementation
@@ -349,7 +349,7 @@ desc->chip->end();
349 </para> 349 </para>
350 </sect3> 350 </sect3>
351 </sect2> 351 </sect2>
352 <sect2> 352 <sect2 id="Quirks_and_optimizations">
353 <title>Quirks and optimizations</title> 353 <title>Quirks and optimizations</title>
354 <para> 354 <para>
355 The generic functions are intended for 'clean' architectures and chips, 355 The generic functions are intended for 'clean' architectures and chips,
@@ -358,7 +358,7 @@ desc->chip->end();
358 overriding the highlevel irq-flow handler. 358 overriding the highlevel irq-flow handler.
359 </para> 359 </para>
360 </sect2> 360 </sect2>
361 <sect2> 361 <sect2 id="Delayed_interrupt_disable">
362 <title>Delayed interrupt disable</title> 362 <title>Delayed interrupt disable</title>
363 <para> 363 <para>
364 This per interrupt selectable feature, which was introduced by Russell 364 This per interrupt selectable feature, which was introduced by Russell
@@ -380,7 +380,7 @@ desc->chip->end();
380 </para> 380 </para>
381 </sect2> 381 </sect2>
382 </sect1> 382 </sect1>
383 <sect1> 383 <sect1 id="Chiplevel_hardware_encapsulation">
384 <title>Chiplevel hardware encapsulation</title> 384 <title>Chiplevel hardware encapsulation</title>
385 <para> 385 <para>
386 The chip level hardware descriptor structure irq_chip 386 The chip level hardware descriptor structure irq_chip