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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-25 01:35:03 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-25 01:35:03 -0400
commitc174aff95642bcc830102becb9802adeb8f87a5a (patch)
tree360ad80985487939be071bf0205cdaa5ca88155f /Documentation
parentfb2e405fc1fc8b20d9c78eaa1c7fd5a297efde43 (diff)
parent79c28acb2b7d66ca48d23e1c8b5e9e043aa634f8 (diff)
Merge commit 'gcl/gcl-next'
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/powerpc/booting-without-of.txt57
1 files changed, 57 insertions, 0 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index ea1b70b35793..99514ced82c5 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -59,6 +59,7 @@ Table of Contents
59 p) Freescale Synchronous Serial Interface 59 p) Freescale Synchronous Serial Interface
60 q) USB EHCI controllers 60 q) USB EHCI controllers
61 r) MDIO on GPIOs 61 r) MDIO on GPIOs
62 s) SPI busses
62 63
63 VII - Marvell Discovery mv64[345]6x System Controller chips 64 VII - Marvell Discovery mv64[345]6x System Controller chips
64 1) The /system-controller node 65 1) The /system-controller node
@@ -1883,6 +1884,62 @@ platforms are moved over to use the flattened-device-tree model.
1883 &qe_pio_c 6>; 1884 &qe_pio_c 6>;
1884 }; 1885 };
1885 1886
1887 s) SPI (Serial Peripheral Interface) busses
1888
1889 SPI busses can be described with a node for the SPI master device
1890 and a set of child nodes for each SPI slave on the bus. For this
1891 discussion, it is assumed that the system's SPI controller is in
1892 SPI master mode. This binding does not describe SPI controllers
1893 in slave mode.
1894
1895 The SPI master node requires the following properties:
1896 - #address-cells - number of cells required to define a chip select
1897 address on the SPI bus.
1898 - #size-cells - should be zero.
1899 - compatible - name of SPI bus controller following generic names
1900 recommended practice.
1901 No other properties are required in the SPI bus node. It is assumed
1902 that a driver for an SPI bus device will understand that it is an SPI bus.
1903 However, the binding does not attempt to define the specific method for
1904 assigning chip select numbers. Since SPI chip select configuration is
1905 flexible and non-standardized, it is left out of this binding with the
1906 assumption that board specific platform code will be used to manage
1907 chip selects. Individual drivers can define additional properties to
1908 support describing the chip select layout.
1909
1910 SPI slave nodes must be children of the SPI master node and can
1911 contain the following properties.
1912 - reg - (required) chip select address of device.
1913 - compatible - (required) name of SPI device following generic names
1914 recommended practice
1915 - spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
1916 - spi-cpol - (optional) Empty property indicating device requires
1917 inverse clock polarity (CPOL) mode
1918 - spi-cpha - (optional) Empty property indicating device requires
1919 shifted clock phase (CPHA) mode
1920
1921 SPI example for an MPC5200 SPI bus:
1922 spi@f00 {
1923 #address-cells = <1>;
1924 #size-cells = <0>;
1925 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
1926 reg = <0xf00 0x20>;
1927 interrupts = <2 13 0 2 14 0>;
1928 interrupt-parent = <&mpc5200_pic>;
1929
1930 ethernet-switch@0 {
1931 compatible = "micrel,ks8995m";
1932 spi-max-frequency = <1000000>;
1933 reg = <0>;
1934 };
1935
1936 codec@1 {
1937 compatible = "ti,tlv320aic26";
1938 spi-max-frequency = <100000>;
1939 reg = <1>;
1940 };
1941 };
1942
1886VII - Marvell Discovery mv64[345]6x System Controller chips 1943VII - Marvell Discovery mv64[345]6x System Controller chips
1887=========================================================== 1944===========================================================
1888 1945