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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2015-04-01 02:22:44 -0400
committerVinod Koul <vinod.koul@intel.com>2015-04-02 03:27:31 -0400
commita7267831565030ab94dab76eb1afe5d4b63a1009 (patch)
treee6c0d18d2b4a02fc4c40efabfcfb2ecef4eec974 /Documentation
parentab7add30ce63a7147f045f00c65a44c0f14ad6b2 (diff)
dmaengine: renesas,usb-dmac: Add device tree bindings documentation
Document the device tree bindings for the Renesas USB DMA Controller (USB-DMAC). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt37
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diff --git a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt
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1* Renesas USB DMA Controller Device Tree bindings
2
3Required Properties:
4- compatible: must contain "renesas,usb-dmac"
5- reg: base address and length of the registers block for the DMAC
6- interrupts: interrupt specifiers for the DMAC, one for each entry in
7 interrupt-names.
8- interrupt-names: one entry per channel, named "ch%u", where %u is the
9 channel number ranging from zero to the number of channels minus one.
10- clocks: a list of phandle + clock-specifier pairs.
11- #dma-cells: must be <1>, the cell specifies the channel number of the DMAC
12 port connected to the DMA client.
13- dma-channels: number of DMA channels
14
15Example: R8A7790 (R-Car H2) USB-DMACs
16
17 usb_dmac0: dma-controller@e65a0000 {
18 compatible = "renesas,usb-dmac";
19 reg = <0 0xe65a0000 0 0x100>;
20 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH
21 0 109 IRQ_TYPE_LEVEL_HIGH>;
22 interrupt-names = "ch0", "ch1";
23 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
24 #dma-cells = <1>;
25 dma-channels = <2>;
26 };
27
28 usb_dmac1: dma-controller@e65b0000 {
29 compatible = "renesas,usb-dmac";
30 reg = <0 0xe65b0000 0 0x100>;
31 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH
32 0 110 IRQ_TYPE_LEVEL_HIGH>;
33 interrupt-names = "ch0", "ch1";
34 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
35 #dma-cells = <1>;
36 dma-channels = <2>;
37 };