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authorGeert Uytterhoeven <geert+renesas@glider.be>2014-06-16 09:13:24 -0400
committerVinod Koul <vinod.koul@intel.com>2014-07-14 13:01:28 -0400
commit96cb989857ddfe176f5d5258fbf750bb818c6500 (patch)
tree2ddc7b2e0316fa5344ab8be7e78f4693572831af /Documentation
parent9f92d2232d5fabe18741044d8004160f8cf80e9e (diff)
dmaengine: Update documentation for inline wrappers
During the last few years, several inline wrappers for DMA operations have been introduced: - commit 16052827d98fbc13c31ebad560af4bd53e2b4dd5 ("dmaengine/dma_slave: introduce inline wrappers"), - commit a14acb4ac2a1486f6633c55eb7f7ded07f3ec9fc ("DMAEngine: add dmaengine_prep_interleaved_dma wrapper for interleaved api"), - commit 6e3ecaf0ad49de0bed829d409a164e7107c02993 ("dmaengine: add wrapper functions for device control functions"). Update the documentation to use the wrappers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/dmaengine.txt11
1 files changed, 5 insertions, 6 deletions
diff --git a/Documentation/dmaengine.txt b/Documentation/dmaengine.txt
index 879b6e31e2da..2def665baf6e 100644
--- a/Documentation/dmaengine.txt
+++ b/Documentation/dmaengine.txt
@@ -84,16 +84,16 @@ The slave DMA usage consists of following steps:
84 the given transaction. 84 the given transaction.
85 85
86 Interface: 86 Interface:
87 struct dma_async_tx_descriptor *(*chan->device->device_prep_slave_sg)( 87 struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
88 struct dma_chan *chan, struct scatterlist *sgl, 88 struct dma_chan *chan, struct scatterlist *sgl,
89 unsigned int sg_len, enum dma_data_direction direction, 89 unsigned int sg_len, enum dma_data_direction direction,
90 unsigned long flags); 90 unsigned long flags);
91 91
92 struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_cyclic)( 92 struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
93 struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, 93 struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
94 size_t period_len, enum dma_data_direction direction); 94 size_t period_len, enum dma_data_direction direction);
95 95
96 struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)( 96 struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
97 struct dma_chan *chan, struct dma_interleaved_template *xt, 97 struct dma_chan *chan, struct dma_interleaved_template *xt,
98 unsigned long flags); 98 unsigned long flags);
99 99
@@ -107,8 +107,7 @@ The slave DMA usage consists of following steps:
107 if (nr_sg == 0) 107 if (nr_sg == 0)
108 /* error */ 108 /* error */
109 109
110 desc = chan->device->device_prep_slave_sg(chan, sgl, nr_sg, 110 desc = dmaengine_prep_slave_sg(chan, sgl, nr_sg, direction, flags);
111 direction, flags);
112 111
113 Once a descriptor has been obtained, the callback information can be 112 Once a descriptor has been obtained, the callback information can be
114 added and the descriptor must then be submitted. Some DMA engine 113 added and the descriptor must then be submitted. Some DMA engine
@@ -188,7 +187,7 @@ Further APIs:
188 description of this API. 187 description of this API.
189 188
190 This can be used in conjunction with dma_async_is_complete() and 189 This can be used in conjunction with dma_async_is_complete() and
191 the cookie returned from 'descriptor->submit()' to check for 190 the cookie returned from dmaengine_submit() to check for
192 completion of a specific DMA transaction. 191 completion of a specific DMA transaction.
193 192
194 Note: 193 Note: