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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-11 12:59:50 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-11 12:59:50 -0400
commitf2c60ed038dedcc43a0eb3ef4e0602741ba90384 (patch)
tree1d06b6c080e1c164d87b66f8cc4b13203378b85a /Documentation
parentcabca0cb0d0e8579428d8f8c3f606e2f01d26d14 (diff)
parent3f2d560e9029ec0b7edf8be0c32425f4bb57d582 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (28 commits) [MIPS] Rework cobalt_board_id [MIPS] Use RTC_CMOS for Cobalt [MIPS] Use platform_device for Cobalt UART [MIPS] Separate Alchemy processor based boards config [MIPS] Fix build error in atomic64_cmpxchg [MIPS] Run checksyscalls for N32 and O32 ABI [MIPS] tlbex: use __maybe_unused [MIPS] excite: use __maybe_unused [MIPS] Add extern cobalt_board_id [MIPS] Remove unused CONFIG_TOSHIBA_BOARDS [MIPS] Rename tb0229_defconfig to tb0219_defconfig [MIPS] Update tb0229_defconfig; add CONFIG_GPIO_TB0219. [MIPS] Add minimum defconfig for RBHMA4200 [MIPS] SB1: Build fix. [MIPS] Drop __devinit tag from allocate_irqno() and free_irqno() [MIPS] clocksource: use CLOCKSOURCE_MASK() macro [MIPS] Remove LIMITED_DMA support [MIPS] Remove Momenco Jaguar ATX support [MIPS] Remove Momenco Ocelot G support [MIPS] FPU hazard handling ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/mips/pci/pci.README54
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diff --git a/Documentation/mips/pci/pci.README b/Documentation/mips/pci/pci.README
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1
2Pete Popov, ppopov@pacbell.net
307/11/2001
4
5This README briefly explains how to use the pci and pci_auto
6code in arch/mips/kernel. The code was ported from PowerPC and
7modified slightly. It has been tested pretty well on PPC on some
8rather complex systems with multiple bridges and devices behind
9each bridge. However, at the time this README was written, the
10mips port was tested only on boards with a single pci bus and
11no P2P bridges. It's very possible that on boards with P2P
12bridges some modifications have to be made. The code will
13evolve, no doubt, but currently every single mips board
14is doing its own pcibios thing and it has become a big
15mess. This generic pci code is meant to clean up the mips
16pci mess and make it easier to add pci support to new boards.
17
18inside the define for your board in arch/mips/config.in.
19For example, the Galileo EV96100 board looks like this:
20
21if [ "$CONFIG_MIPS_EV96100" = "y" ]; then
22 define_bool CONFIG_PCI y
23 define_bool CONFIG_MIPS_GT96100 y
24 define_bool CONFIG_NEW_PCI y
25 define_bool CONFIG_SWAP_IO_SPACE y
26fi
27
28
29Next, if you want to use the arch/mips/kernel/pci code, which has the
30pcibios_init() function, add
31
32define_bool CONFIG_NEW_PCI y
33
34inside the define for your board. Again, the EV96100 example above
35show NEW_PCI turned on.
36
37
38Now you need to add your files to hook in your pci configuration
39cycles. Usually you'll need only a couple of files named something
40like pci_fixups.c and pci_ops.c. You can copy the templates
41provided and fill in the code.
42
43The file pci_ops.c should contain the pci configuration cycles routines.
44It also has the mips_pci_channels[] array which contains the descriptors
45of each pci controller.
46
47The file pci_fixups.c contains a few routines to do interrupt fixups,
48resources fixups, and, if needed, pci bios fixups.
49
50Usually you'll put your pci_fixups.c file in your board specific directory,
51since the functions in that file are board specific. The functions in
52pci_ops.c, on the other hand, are usually pci controller specific so that
53file could be shared among a few different boards using the same
54pci controller.