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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-07 12:02:26 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-07 12:02:26 -0500
commit37969581301e50872a1ae84dc73962b5f7ee6b76 (patch)
tree35bbd6a07f903f248f4bd209b8d194a922415fe0 /Documentation
parent80ff8a805113850a3ffafcc8e6eaa1fdd51b02f3 (diff)
parent24f1a849614ba1805e26a05da7cc8c6bd67490ea (diff)
Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (69 commits) [POWERPC] Add SPE registers to core dumps [POWERPC] Use regset code for compat PTRACE_*REGS* calls [POWERPC] Use generic compat_sys_ptrace [POWERPC] Use generic compat_ptrace_request [POWERPC] Use generic ptrace peekdata/pokedata [POWERPC] Use regset code for PTRACE_*REGS* requests [POWERPC] Switch to generic compat_binfmt_elf code [POWERPC] Switch to using user_regset-based core dumps [POWERPC] Add user_regset compat support [POWERPC] Add user_regset_view definitions [POWERPC] Use user_regset accessors for GPRs [POWERPC] ptrace accessors for special regs MSR and TRAP [POWERPC] Use user_regset accessors for SPE regs [POWERPC] Use user_regset accessors for altivec regs [POWERPC] Use user_regset accessors for FP regs [POWERPC] mpc52xx: fix compile error introduce when rebasing patch [POWERPC] 4xx: PCIe indirect DCR spinlock fix. [POWERPC] Add missing native dcr dcr_ind_lock spinlock [POWERPC] 4xx: Fix offset value on Warp board [POWERPC] 4xx: Add 440EPx Sequoia ehci dts entry ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/powerpc/booting-without-of.txt42
1 files changed, 42 insertions, 0 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index b5e46efeba84..7b4e8a70882c 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -57,6 +57,7 @@ Table of Contents
57 n) 4xx/Axon EMAC ethernet nodes 57 n) 4xx/Axon EMAC ethernet nodes
58 o) Xilinx IP cores 58 o) Xilinx IP cores
59 p) Freescale Synchronous Serial Interface 59 p) Freescale Synchronous Serial Interface
60 q) USB EHCI controllers
60 61
61 VII - Specifying interrupt information for devices 62 VII - Specifying interrupt information for devices
62 1) interrupts property 63 1) interrupts property
@@ -2577,6 +2578,20 @@ platforms are moved over to use the flattened-device-tree model.
2577 Requred properties: 2578 Requred properties:
2578 - current-speed : Baud rate of uartlite 2579 - current-speed : Baud rate of uartlite
2579 2580
2581 v) Xilinx hwicap
2582
2583 Xilinx hwicap devices provide access to the configuration logic
2584 of the FPGA through the Internal Configuration Access Port
2585 (ICAP). The ICAP enables partial reconfiguration of the FPGA,
2586 readback of the configuration information, and some control over
2587 'warm boots' of the FPGA fabric.
2588
2589 Required properties:
2590 - xlnx,family : The family of the FPGA, necessary since the
2591 capabilities of the underlying ICAP hardware
2592 differ between different families. May be
2593 'virtex2p', 'virtex4', or 'virtex5'.
2594
2580 p) Freescale Synchronous Serial Interface 2595 p) Freescale Synchronous Serial Interface
2581 2596
2582 The SSI is a serial device that communicates with audio codecs. It can 2597 The SSI is a serial device that communicates with audio codecs. It can
@@ -2775,6 +2790,33 @@ platforms are moved over to use the flattened-device-tree model.
2775 interrupt-parent = < &ipic >; 2790 interrupt-parent = < &ipic >;
2776 }; 2791 };
2777 2792
2793 q) USB EHCI controllers
2794
2795 Required properties:
2796 - compatible : should be "usb-ehci".
2797 - reg : should contain at least address and length of the standard EHCI
2798 register set for the device. Optional platform-dependent registers
2799 (debug-port or other) can be also specified here, but only after
2800 definition of standard EHCI registers.
2801 - interrupts : one EHCI interrupt should be described here.
2802 If device registers are implemented in big endian mode, the device
2803 node should have "big-endian-regs" property.
2804 If controller implementation operates with big endian descriptors,
2805 "big-endian-desc" property should be specified.
2806 If both big endian registers and descriptors are used by the controller
2807 implementation, "big-endian" property can be specified instead of having
2808 both "big-endian-regs" and "big-endian-desc".
2809
2810 Example (Sequoia 440EPx):
2811 ehci@e0000300 {
2812 compatible = "ibm,usb-ehci-440epx", "usb-ehci";
2813 interrupt-parent = <&UIC0>;
2814 interrupts = <1a 4>;
2815 reg = <0 e0000300 90 0 e0000390 70>;
2816 big-endian;
2817 };
2818
2819
2778 More devices will be defined as this spec matures. 2820 More devices will be defined as this spec matures.
2779 2821
2780VII - Specifying interrupt information for devices 2822VII - Specifying interrupt information for devices