diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-22 18:08:56 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-22 18:08:56 -0400 |
commit | d588fcbe5a7ba8bba2cebf7799ab2d573717a806 (patch) | |
tree | 2c82f5d26bd9f2e2f82711ef58f3c7a1b6a9a4df /Documentation | |
parent | eaa8568901b3164197ce727c4c9b4067383e526c (diff) | |
parent | 4941b395b3c2635a8c16d88791a789fb6ac6be43 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/i2c-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/i2c-2.6: (44 commits)
[PATCH] I2C: I2C controllers go into right place on sysfs
[PATCH] hwmon-vid: Add support for Intel Core and Conroe
[PATCH] lm70: New hardware monitoring driver
[PATCH] hwmon: Fix the Kconfig header
[PATCH] i2c-i801: Merge setup function
[PATCH] i2c-i801: Better pci subsystem integration
[PATCH] i2c-i801: Cleanups
[PATCH] i2c-i801: Remove PCI function check
[PATCH] i2c-i801: Remove force_addr parameter
[PATCH] i2c-i801: Fix block transaction poll loops
[PATCH] scx200_acb: Documentation update
[PATCH] scx200_acb: Mark scx200_acb_probe __init
[PATCH] scx200_acb: Use PCI I/O resource when appropriate
[PATCH] i2c: Mark block write buffers as const
[PATCH] i2c-ocores: Minor cleanups
[PATCH] abituguru: Fix fan detection
[PATCH] abituguru: Review fixes
[PATCH] abituguru: New hardware monitoring driver
[PATCH] w83792d: Add missing data access locks
[PATCH] w83792d: Fix setting the PWM value
...
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/hwmon/abituguru | 59 | ||||
-rw-r--r-- | Documentation/hwmon/abituguru-datasheet | 312 | ||||
-rw-r--r-- | Documentation/hwmon/lm70 | 31 | ||||
-rw-r--r-- | Documentation/hwmon/lm83 | 17 | ||||
-rw-r--r-- | Documentation/hwmon/smsc47m192 | 102 | ||||
-rw-r--r-- | Documentation/hwmon/sysfs-interface | 274 | ||||
-rw-r--r-- | Documentation/hwmon/userspace-tools | 17 | ||||
-rw-r--r-- | Documentation/hwmon/w83791d | 113 | ||||
-rw-r--r-- | Documentation/i2c/busses/i2c-i801 | 3 | ||||
-rw-r--r-- | Documentation/i2c/busses/i2c-nforce2 | 2 | ||||
-rw-r--r-- | Documentation/i2c/busses/i2c-ocores | 51 | ||||
-rw-r--r-- | Documentation/i2c/busses/i2c-piix4 | 40 | ||||
-rw-r--r-- | Documentation/i2c/busses/scx200_acb | 19 |
13 files changed, 931 insertions, 109 deletions
diff --git a/Documentation/hwmon/abituguru b/Documentation/hwmon/abituguru new file mode 100644 index 000000000000..69cdb527d58f --- /dev/null +++ b/Documentation/hwmon/abituguru | |||
@@ -0,0 +1,59 @@ | |||
1 | Kernel driver abituguru | ||
2 | ======================= | ||
3 | |||
4 | Supported chips: | ||
5 | * Abit uGuru (Hardware Monitor part only) | ||
6 | Prefix: 'abituguru' | ||
7 | Addresses scanned: ISA 0x0E0 | ||
8 | Datasheet: Not available, this driver is based on reverse engineering. | ||
9 | A "Datasheet" has been written based on the reverse engineering it | ||
10 | should be available in the same dir as this file under the name | ||
11 | abituguru-datasheet. | ||
12 | |||
13 | Authors: | ||
14 | Hans de Goede <j.w.r.degoede@hhs.nl>, | ||
15 | (Initial reverse engineering done by Olle Sandberg | ||
16 | <ollebull@gmail.com>) | ||
17 | |||
18 | |||
19 | Module Parameters | ||
20 | ----------------- | ||
21 | |||
22 | * force: bool Force detection. Note this parameter only causes the | ||
23 | detection to be skipped, if the uGuru can't be read | ||
24 | the module initialization (insmod) will still fail. | ||
25 | * fan_sensors: int Tell the driver how many fan speed sensors there are | ||
26 | on your motherboard. Default: 0 (autodetect). | ||
27 | * pwms: int Tell the driver how many fan speed controls (fan | ||
28 | pwms) your motherboard has. Default: 0 (autodetect). | ||
29 | * verbose: int How verbose should the driver be? (0-3): | ||
30 | 0 normal output | ||
31 | 1 + verbose error reporting | ||
32 | 2 + sensors type probing info\n" | ||
33 | 3 + retryable error reporting | ||
34 | Default: 2 (the driver is still in the testing phase) | ||
35 | |||
36 | Notice if you need any of the first three options above please insmod the | ||
37 | driver with verbose set to 3 and mail me <j.w.r.degoede@hhs.nl> the output of: | ||
38 | dmesg | grep abituguru | ||
39 | |||
40 | |||
41 | Description | ||
42 | ----------- | ||
43 | |||
44 | This driver supports the hardware monitoring features of the Abit uGuru chip | ||
45 | found on Abit uGuru featuring motherboards (most modern Abit motherboards). | ||
46 | |||
47 | The uGuru chip in reality is a Winbond W83L950D in disguise (despite Abit | ||
48 | claiming it is "a new microprocessor designed by the ABIT Engineers"). | ||
49 | Unfortunatly this doesn't help since the W83L950D is a generic | ||
50 | microcontroller with a custom Abit application running on it. | ||
51 | |||
52 | Despite Abit not releasing any information regarding the uGuru, Olle | ||
53 | Sandberg <ollebull@gmail.com> has managed to reverse engineer the sensor part | ||
54 | of the uGuru. Without his work this driver would not have been possible. | ||
55 | |||
56 | Known Issues | ||
57 | ------------ | ||
58 | |||
59 | The voltage and frequency control parts of the Abit uGuru are not supported. | ||
diff --git a/Documentation/hwmon/abituguru-datasheet b/Documentation/hwmon/abituguru-datasheet new file mode 100644 index 000000000000..aef5a9b36846 --- /dev/null +++ b/Documentation/hwmon/abituguru-datasheet | |||
@@ -0,0 +1,312 @@ | |||
1 | uGuru datasheet | ||
2 | =============== | ||
3 | |||
4 | First of all, what I know about uGuru is no fact based on any help, hints or | ||
5 | datasheet from Abit. The data I have got on uGuru have I assembled through | ||
6 | my weak knowledge in "backwards engineering". | ||
7 | And just for the record, you may have noticed uGuru isn't a chip developed by | ||
8 | Abit, as they claim it to be. It's realy just an microprocessor (uC) created by | ||
9 | Winbond (W83L950D). And no, reading the manual for this specific uC or | ||
10 | mailing Windbond for help won't give any usefull data about uGuru, as it is | ||
11 | the program inside the uC that is responding to calls. | ||
12 | |||
13 | Olle Sandberg <ollebull@gmail.com>, 2005-05-25 | ||
14 | |||
15 | |||
16 | Original version by Olle Sandberg who did the heavy lifting of the initial | ||
17 | reverse engineering. This version has been almost fully rewritten for clarity | ||
18 | and extended with write support and info on more databanks, the write support | ||
19 | is once again reverse engineered by Olle the additional databanks have been | ||
20 | reverse engineered by me. I would like to express my thanks to Olle, this | ||
21 | document and the Linux driver could not have been written without his efforts. | ||
22 | |||
23 | Note: because of the lack of specs only the sensors part of the uGuru is | ||
24 | described here and not the CPU / RAM / etc voltage & frequency control. | ||
25 | |||
26 | Hans de Goede <j.w.r.degoede@hhs.nl>, 28-01-2006 | ||
27 | |||
28 | |||
29 | Detection | ||
30 | ========= | ||
31 | |||
32 | As far as known the uGuru is always placed at and using the (ISA) I/O-ports | ||
33 | 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two | ||
34 | ports are holding for detection. We will refer to 0xE0 as CMD (command-port) | ||
35 | and 0xE4 as DATA because Abit refers to them with these names. | ||
36 | |||
37 | If DATA holds 0x00 or 0x08 and CMD holds 0x00 or 0xAC an uGuru could be | ||
38 | present. We have to check for two different values at data-port, because | ||
39 | after a reboot uGuru will hold 0x00 here, but if the driver is removed and | ||
40 | later on attached again data-port will hold 0x08, more about this later. | ||
41 | |||
42 | After wider testing of the Linux kernel driver some variants of the uGuru have | ||
43 | turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also | ||
44 | have to test CMD for two different values. On these uGuru's DATA will initally | ||
45 | hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read | ||
46 | first! | ||
47 | |||
48 | To be really sure an uGuru is present a test read of one or more register | ||
49 | sets should be done. | ||
50 | |||
51 | |||
52 | Reading / Writing | ||
53 | ================= | ||
54 | |||
55 | Addressing | ||
56 | ---------- | ||
57 | |||
58 | The uGuru has a number of different addressing levels. The first addressing | ||
59 | level we will call banks. A bank holds data for one or more sensors. The data | ||
60 | in a bank for a sensor is one or more bytes large. | ||
61 | |||
62 | The number of bytes is fixed for a given bank, you should always read or write | ||
63 | that many bytes, reading / writing more will fail, the results when writing | ||
64 | less then the number of bytes for a given bank are undetermined. | ||
65 | |||
66 | See below for all known bank addresses, numbers of sensors in that bank, | ||
67 | number of bytes data per sensor and contents/meaning of those bytes. | ||
68 | |||
69 | Although both this document and the kernel driver have kept the sensor | ||
70 | terminoligy for the addressing within a bank this is not 100% correct, in | ||
71 | bank 0x24 for example the addressing within the bank selects a PWM output not | ||
72 | a sensor. | ||
73 | |||
74 | Notice that some banks have both a read and a write address this is how the | ||
75 | uGuru determines if a read from or a write to the bank is taking place, thus | ||
76 | when reading you should always use the read address and when writing the | ||
77 | write address. The write address is always one (1) more then the read address. | ||
78 | |||
79 | |||
80 | uGuru ready | ||
81 | ----------- | ||
82 | |||
83 | Before you can read from or write to the uGuru you must first put the uGuru | ||
84 | in "ready" mode. | ||
85 | |||
86 | To put the uGuru in ready mode first write 0x00 to DATA and then wait for DATA | ||
87 | to hold 0x09, DATA should read 0x09 within 250 read cycles. | ||
88 | |||
89 | Next CMD _must_ be read and should hold 0xAC, usually CMD will hold 0xAC the | ||
90 | first read but sometimes it takes a while before CMD holds 0xAC and thus it | ||
91 | has to be read a number of times (max 50). | ||
92 | |||
93 | After reading CMD, DATA should hold 0x08 which means that the uGuru is ready | ||
94 | for input. As above DATA will usually hold 0x08 the first read but not always. | ||
95 | This step can be skipped, but it is undetermined what happens if the uGuru has | ||
96 | not yet reported 0x08 at DATA and you proceed with writing a bank address. | ||
97 | |||
98 | |||
99 | Sending bank and sensor addresses to the uGuru | ||
100 | ---------------------------------------------- | ||
101 | |||
102 | First the uGuru must be in "ready" mode as described above, DATA should hold | ||
103 | 0x08 indicating that the uGuru wants input, in this case the bank address. | ||
104 | |||
105 | Next write the bank address to DATA. After the bank address has been written | ||
106 | wait for to DATA to hold 0x08 again indicating that it wants / is ready for | ||
107 | more input (max 250 reads). | ||
108 | |||
109 | Once DATA holds 0x08 again write the sensor address to CMD. | ||
110 | |||
111 | |||
112 | Reading | ||
113 | ------- | ||
114 | |||
115 | First send the bank and sensor addresses as described above. | ||
116 | Then for each byte of data you want to read wait for DATA to hold 0x01 | ||
117 | which indicates that the uGuru is ready to be read (max 250 reads) and once | ||
118 | DATA holds 0x01 read the byte from CMD. | ||
119 | |||
120 | Once all bytes have been read data will hold 0x09, but there is no reason to | ||
121 | test for this. Notice that the number of bytes is bank address dependent see | ||
122 | above and below. | ||
123 | |||
124 | After completing a successfull read it is advised to put the uGuru back in | ||
125 | ready mode, so that it is ready for the next read / write cycle. This way | ||
126 | if your program / driver is unloaded and later loaded again the detection | ||
127 | algorithm described above will still work. | ||
128 | |||
129 | |||
130 | |||
131 | Writing | ||
132 | ------- | ||
133 | |||
134 | First send the bank and sensor addresses as described above. | ||
135 | Then for each byte of data you want to write wait for DATA to hold 0x00 | ||
136 | which indicates that the uGuru is ready to be written (max 250 reads) and | ||
137 | once DATA holds 0x00 write the byte to CMD. | ||
138 | |||
139 | Once all bytes have been written wait for DATA to hold 0x01 (max 250 reads) | ||
140 | don't ask why this is the way it is. | ||
141 | |||
142 | Once DATA holds 0x01 read CMD it should hold 0xAC now. | ||
143 | |||
144 | After completing a successfull write it is advised to put the uGuru back in | ||
145 | ready mode, so that it is ready for the next read / write cycle. This way | ||
146 | if your program / driver is unloaded and later loaded again the detection | ||
147 | algorithm described above will still work. | ||
148 | |||
149 | |||
150 | Gotchas | ||
151 | ------- | ||
152 | |||
153 | After wider testing of the Linux kernel driver some variants of the uGuru have | ||
154 | turned up which do not hold 0x08 at DATA within 250 reads after writing the | ||
155 | bank address. With these versions this happens quite frequent, using larger | ||
156 | timeouts doesn't help, they just go offline for a second or 2, doing some | ||
157 | internal callibration or whatever. Your code should be prepared to handle | ||
158 | this and in case of no response in this specific case just goto sleep for a | ||
159 | while and then retry. | ||
160 | |||
161 | |||
162 | Address Map | ||
163 | =========== | ||
164 | |||
165 | Bank 0x20 Alarms (R) | ||
166 | -------------------- | ||
167 | This bank contains 0 sensors, iow the sensor address is ignored (but must be | ||
168 | written) just use 0. Bank 0x20 contains 3 bytes: | ||
169 | |||
170 | Byte 0: | ||
171 | This byte holds the alarm flags for sensor 0-7 of Sensor Bank1, with bit 0 | ||
172 | corresponding to sensor 0, 1 to 1, etc. | ||
173 | |||
174 | Byte 1: | ||
175 | This byte holds the alarm flags for sensor 8-15 of Sensor Bank1, with bit 0 | ||
176 | corresponding to sensor 8, 1 to 9, etc. | ||
177 | |||
178 | Byte 2: | ||
179 | This byte holds the alarm flags for sensor 0-5 of Sensor Bank2, with bit 0 | ||
180 | corresponding to sensor 0, 1 to 1, etc. | ||
181 | |||
182 | |||
183 | Bank 0x21 Sensor Bank1 Values / Readings (R) | ||
184 | -------------------------------------------- | ||
185 | This bank contains 16 sensors, for each sensor it contains 1 byte. | ||
186 | So far the following sensors are known to be available on all motherboards: | ||
187 | Sensor 0 CPU temp | ||
188 | Sensor 1 SYS temp | ||
189 | Sensor 3 CPU core volt | ||
190 | Sensor 4 DDR volt | ||
191 | Sensor 10 DDR Vtt volt | ||
192 | Sensor 15 PWM temp | ||
193 | |||
194 | Byte 0: | ||
195 | This byte holds the reading from the sensor. Sensors in Bank1 can be both | ||
196 | volt and temp sensors, this is motherboard specific. The uGuru however does | ||
197 | seem to know (be programmed with) what kindoff sensor is attached see Sensor | ||
198 | Bank1 Settings description. | ||
199 | |||
200 | Volt sensors use a linear scale, a reading 0 corresponds with 0 volt and a | ||
201 | reading of 255 with 3494 mV. The sensors for higher voltages however are | ||
202 | connected through a division circuit. The currently known division circuits | ||
203 | in use result in ranges of: 0-4361mV, 0-6248mV or 0-14510mV. 3.3 volt sources | ||
204 | use the 0-4361mV range, 5 volt the 0-6248mV and 12 volt the 0-14510mV . | ||
205 | |||
206 | Temp sensors also use a linear scale, a reading of 0 corresponds with 0 degree | ||
207 | Celsius and a reading of 255 with a reading of 255 degrees Celsius. | ||
208 | |||
209 | |||
210 | Bank 0x22 Sensor Bank1 Settings (R) | ||
211 | Bank 0x23 Sensor Bank1 Settings (W) | ||
212 | ----------------------------------- | ||
213 | |||
214 | This bank contains 16 sensors, for each sensor it contains 3 bytes. Each | ||
215 | set of 3 bytes contains the settings for the sensor with the same sensor | ||
216 | address in Bank 0x21 . | ||
217 | |||
218 | Byte 0: | ||
219 | Alarm behaviour for the selected sensor. A 1 enables the described behaviour. | ||
220 | Bit 0: Give an alarm if measured temp is over the warning threshold (RW) * | ||
221 | Bit 1: Give an alarm if measured volt is over the max threshold (RW) ** | ||
222 | Bit 2: Give an alarm if measured volt is under the min threshold (RW) ** | ||
223 | Bit 3: Beep if alarm (RW) | ||
224 | Bit 4: 1 if alarm cause measured temp is over the warning threshold (R) | ||
225 | Bit 5: 1 if alarm cause measured volt is over the max threshold (R) | ||
226 | Bit 6: 1 if alarm cause measured volt is under the min threshold (R) | ||
227 | Bit 7: Volt sensor: Shutdown if alarm persist for more then 4 seconds (RW) | ||
228 | Temp sensor: Shutdown if temp is over the shutdown threshold (RW) | ||
229 | |||
230 | * This bit is only honored/used by the uGuru if a temp sensor is connected | ||
231 | ** This bit is only honored/used by the uGuru if a volt sensor is connected | ||
232 | Note with some trickery this can be used to find out what kinda sensor is | ||
233 | detected see the Linux kernel driver for an example with many comments on | ||
234 | how todo this. | ||
235 | |||
236 | Byte 1: | ||
237 | Temp sensor: warning threshold (scale as bank 0x21) | ||
238 | Volt sensor: min threshold (scale as bank 0x21) | ||
239 | |||
240 | Byte 2: | ||
241 | Temp sensor: shutdown threshold (scale as bank 0x21) | ||
242 | Volt sensor: max threshold (scale as bank 0x21) | ||
243 | |||
244 | |||
245 | Bank 0x24 PWM outputs for FAN's (R) | ||
246 | Bank 0x25 PWM outputs for FAN's (W) | ||
247 | ----------------------------------- | ||
248 | |||
249 | This bank contains 3 "sensors", for each sensor it contains 5 bytes. | ||
250 | Sensor 0 usually controls the CPU fan | ||
251 | Sensor 1 usually controls the NB (or chipset for single chip) fan | ||
252 | Sensor 2 usually controls the System fan | ||
253 | |||
254 | Byte 0: | ||
255 | Flag 0x80 to enable control, Fan runs at 100% when disabled. | ||
256 | low nibble (temp)sensor address at bank 0x21 used for control. | ||
257 | |||
258 | Byte 1: | ||
259 | 0-255 = 0-12v (linear), specify voltage at which fan will rotate when under | ||
260 | low threshold temp (specified in byte 3) | ||
261 | |||
262 | Byte 2: | ||
263 | 0-255 = 0-12v (linear), specify voltage at which fan will rotate when above | ||
264 | high threshold temp (specified in byte 4) | ||
265 | |||
266 | Byte 3: | ||
267 | Low threshold temp (scale as bank 0x21) | ||
268 | |||
269 | byte 4: | ||
270 | High threshold temp (scale as bank 0x21) | ||
271 | |||
272 | |||
273 | Bank 0x26 Sensors Bank2 Values / Readings (R) | ||
274 | --------------------------------------------- | ||
275 | |||
276 | This bank contains 6 sensors (AFAIK), for each sensor it contains 1 byte. | ||
277 | So far the following sensors are known to be available on all motherboards: | ||
278 | Sensor 0: CPU fan speed | ||
279 | Sensor 1: NB (or chipset for single chip) fan speed | ||
280 | Sensor 2: SYS fan speed | ||
281 | |||
282 | Byte 0: | ||
283 | This byte holds the reading from the sensor. 0-255 = 0-15300 (linear) | ||
284 | |||
285 | |||
286 | Bank 0x27 Sensors Bank2 Settings (R) | ||
287 | Bank 0x28 Sensors Bank2 Settings (W) | ||
288 | ------------------------------------ | ||
289 | |||
290 | This bank contains 6 sensors (AFAIK), for each sensor it contains 2 bytes. | ||
291 | |||
292 | Byte 0: | ||
293 | Alarm behaviour for the selected sensor. A 1 enables the described behaviour. | ||
294 | Bit 0: Give an alarm if measured rpm is under the min threshold (RW) | ||
295 | Bit 3: Beep if alarm (RW) | ||
296 | Bit 7: Shutdown if alarm persist for more then 4 seconds (RW) | ||
297 | |||
298 | Byte 1: | ||
299 | min threshold (scale as bank 0x26) | ||
300 | |||
301 | |||
302 | Warning for the adventerous | ||
303 | =========================== | ||
304 | |||
305 | A word of caution to those who want to experiment and see if they can figure | ||
306 | the voltage / clock programming out, I tried reading and only reading banks | ||
307 | 0-0x30 with the reading code used for the sensor banks (0x20-0x28) and this | ||
308 | resulted in a _permanent_ reprogramming of the voltages, luckily I had the | ||
309 | sensors part configured so that it would shutdown my system on any out of spec | ||
310 | voltages which proprably safed my computer (after a reboot I managed to | ||
311 | immediatly enter the bios and reload the defaults). This probably means that | ||
312 | the read/write cycle for the non sensor part is different from the sensor part. | ||
diff --git a/Documentation/hwmon/lm70 b/Documentation/hwmon/lm70 new file mode 100644 index 000000000000..2bdd3feebf53 --- /dev/null +++ b/Documentation/hwmon/lm70 | |||
@@ -0,0 +1,31 @@ | |||
1 | Kernel driver lm70 | ||
2 | ================== | ||
3 | |||
4 | Supported chip: | ||
5 | * National Semiconductor LM70 | ||
6 | Datasheet: http://www.national.com/pf/LM/LM70.html | ||
7 | |||
8 | Author: | ||
9 | Kaiwan N Billimoria <kaiwan@designergraphix.com> | ||
10 | |||
11 | Description | ||
12 | ----------- | ||
13 | |||
14 | This driver implements support for the National Semiconductor LM70 | ||
15 | temperature sensor. | ||
16 | |||
17 | The LM70 temperature sensor chip supports a single temperature sensor. | ||
18 | It communicates with a host processor (or microcontroller) via an | ||
19 | SPI/Microwire Bus interface. | ||
20 | |||
21 | Communication with the LM70 is simple: when the temperature is to be sensed, | ||
22 | the driver accesses the LM70 using SPI communication: 16 SCLK cycles | ||
23 | comprise the MOSI/MISO loop. At the end of the transfer, the 11-bit 2's | ||
24 | complement digital temperature (sent via the SIO line), is available in the | ||
25 | driver for interpretation. This driver makes use of the kernel's in-core | ||
26 | SPI support. | ||
27 | |||
28 | Thanks to | ||
29 | --------- | ||
30 | Jean Delvare <khali@linux-fr.org> for mentoring the hwmon-side driver | ||
31 | development. | ||
diff --git a/Documentation/hwmon/lm83 b/Documentation/hwmon/lm83 index 061d9ed8ff43..f7aad1489cb0 100644 --- a/Documentation/hwmon/lm83 +++ b/Documentation/hwmon/lm83 | |||
@@ -7,6 +7,10 @@ Supported chips: | |||
7 | Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e | 7 | Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e |
8 | Datasheet: Publicly available at the National Semiconductor website | 8 | Datasheet: Publicly available at the National Semiconductor website |
9 | http://www.national.com/pf/LM/LM83.html | 9 | http://www.national.com/pf/LM/LM83.html |
10 | * National Semiconductor LM82 | ||
11 | Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e | ||
12 | Datasheet: Publicly available at the National Semiconductor website | ||
13 | http://www.national.com/pf/LM/LM82.html | ||
10 | 14 | ||
11 | 15 | ||
12 | Author: Jean Delvare <khali@linux-fr.org> | 16 | Author: Jean Delvare <khali@linux-fr.org> |
@@ -15,10 +19,11 @@ Description | |||
15 | ----------- | 19 | ----------- |
16 | 20 | ||
17 | The LM83 is a digital temperature sensor. It senses its own temperature as | 21 | The LM83 is a digital temperature sensor. It senses its own temperature as |
18 | well as the temperature of up to three external diodes. It is compatible | 22 | well as the temperature of up to three external diodes. The LM82 is |
19 | with many other devices such as the LM84 and all other ADM1021 clones. | 23 | a stripped down version of the LM83 that only supports one external diode. |
20 | The main difference between the LM83 and the LM84 in that the later can | 24 | Both are compatible with many other devices such as the LM84 and all |
21 | only sense the temperature of one external diode. | 25 | other ADM1021 clones. The main difference between the LM83 and the LM84 |
26 | in that the later can only sense the temperature of one external diode. | ||
22 | 27 | ||
23 | Using the adm1021 driver for a LM83 should work, but only two temperatures | 28 | Using the adm1021 driver for a LM83 should work, but only two temperatures |
24 | will be reported instead of four. | 29 | will be reported instead of four. |
@@ -30,12 +35,16 @@ contact us. Note that the LM90 can easily be misdetected as a LM83. | |||
30 | 35 | ||
31 | Confirmed motherboards: | 36 | Confirmed motherboards: |
32 | SBS P014 | 37 | SBS P014 |
38 | SBS PSL09 | ||
33 | 39 | ||
34 | Unconfirmed motherboards: | 40 | Unconfirmed motherboards: |
35 | Gigabyte GA-8IK1100 | 41 | Gigabyte GA-8IK1100 |
36 | Iwill MPX2 | 42 | Iwill MPX2 |
37 | Soltek SL-75DRV5 | 43 | Soltek SL-75DRV5 |
38 | 44 | ||
45 | The LM82 is confirmed to have been found on most AMD Geode reference | ||
46 | designs and test platforms. | ||
47 | |||
39 | The driver has been successfully tested by Magnus Forsström, who I'd | 48 | The driver has been successfully tested by Magnus Forsström, who I'd |
40 | like to thank here. More testers will be of course welcome. | 49 | like to thank here. More testers will be of course welcome. |
41 | 50 | ||
diff --git a/Documentation/hwmon/smsc47m192 b/Documentation/hwmon/smsc47m192 new file mode 100644 index 000000000000..45d6453cd435 --- /dev/null +++ b/Documentation/hwmon/smsc47m192 | |||
@@ -0,0 +1,102 @@ | |||
1 | Kernel driver smsc47m192 | ||
2 | ======================== | ||
3 | |||
4 | Supported chips: | ||
5 | * SMSC LPC47M192 and LPC47M997 | ||
6 | Prefix: 'smsc47m192' | ||
7 | Addresses scanned: I2C 0x2c - 0x2d | ||
8 | Datasheet: The datasheet for LPC47M192 is publicly available from | ||
9 | http://www.smsc.com/ | ||
10 | The LPC47M997 is compatible for hardware monitoring. | ||
11 | |||
12 | Author: Hartmut Rick <linux@rick.claranet.de> | ||
13 | Special thanks to Jean Delvare for careful checking | ||
14 | of the code and many helpful comments and suggestions. | ||
15 | |||
16 | |||
17 | Description | ||
18 | ----------- | ||
19 | |||
20 | This driver implements support for the hardware sensor capabilities | ||
21 | of the SMSC LPC47M192 and LPC47M997 Super-I/O chips. | ||
22 | |||
23 | These chips support 3 temperature channels and 8 voltage inputs | ||
24 | as well as CPU voltage VID input. | ||
25 | |||
26 | They do also have fan monitoring and control capabilities, but the | ||
27 | these features are accessed via ISA bus and are not supported by this | ||
28 | driver. Use the 'smsc47m1' driver for fan monitoring and control. | ||
29 | |||
30 | Voltages and temperatures are measured by an 8-bit ADC, the resolution | ||
31 | of the temperatures is 1 bit per degree C. | ||
32 | Voltages are scaled such that the nominal voltage corresponds to | ||
33 | 192 counts, i.e. 3/4 of the full range. Thus the available range for | ||
34 | each voltage channel is 0V ... 255/192*(nominal voltage), the resolution | ||
35 | is 1 bit per (nominal voltage)/192. | ||
36 | Both voltage and temperature values are scaled by 1000, the sys files | ||
37 | show voltages in mV and temperatures in units of 0.001 degC. | ||
38 | |||
39 | The +12V analog voltage input channel (in4_input) is multiplexed with | ||
40 | bit 4 of the encoded CPU voltage. This means that you either get | ||
41 | a +12V voltage measurement or a 5 bit CPU VID, but not both. | ||
42 | The default setting is to use the pin as 12V input, and use only 4 bit VID. | ||
43 | This driver assumes that the information in the configuration register | ||
44 | is correct, i.e. that the BIOS has updated the configuration if | ||
45 | the motherboard has this input wired to VID4. | ||
46 | |||
47 | The temperature and voltage readings are updated once every 1.5 seconds. | ||
48 | Reading them more often repeats the same values. | ||
49 | |||
50 | |||
51 | sysfs interface | ||
52 | --------------- | ||
53 | |||
54 | in0_input - +2.5V voltage input | ||
55 | in1_input - CPU voltage input (nominal 2.25V) | ||
56 | in2_input - +3.3V voltage input | ||
57 | in3_input - +5V voltage input | ||
58 | in4_input - +12V voltage input (may be missing if used as VID4) | ||
59 | in5_input - Vcc voltage input (nominal 3.3V) | ||
60 | This is the supply voltage of the sensor chip itself. | ||
61 | in6_input - +1.5V voltage input | ||
62 | in7_input - +1.8V voltage input | ||
63 | |||
64 | in[0-7]_min, | ||
65 | in[0-7]_max - lower and upper alarm thresholds for in[0-7]_input reading | ||
66 | |||
67 | All voltages are read and written in mV. | ||
68 | |||
69 | in[0-7]_alarm - alarm flags for voltage inputs | ||
70 | These files read '1' in case of alarm, '0' otherwise. | ||
71 | |||
72 | temp1_input - chip temperature measured by on-chip diode | ||
73 | temp[2-3]_input - temperature measured by external diodes (one of these would | ||
74 | typically be wired to the diode inside the CPU) | ||
75 | |||
76 | temp[1-3]_min, | ||
77 | temp[1-3]_max - lower and upper alarm thresholds for temperatures | ||
78 | |||
79 | temp[1-3]_offset - temperature offset registers | ||
80 | The chip adds the offsets stored in these registers to | ||
81 | the corresponding temperature readings. | ||
82 | Note that temp1 and temp2 offsets share the same register, | ||
83 | they cannot both be different from zero at the same time. | ||
84 | Writing a non-zero number to one of them will reset the other | ||
85 | offset to zero. | ||
86 | |||
87 | All temperatures and offsets are read and written in | ||
88 | units of 0.001 degC. | ||
89 | |||
90 | temp[1-3]_alarm - alarm flags for temperature inputs, '1' in case of alarm, | ||
91 | '0' otherwise. | ||
92 | temp[2-3]_input_fault - diode fault flags for temperature inputs 2 and 3. | ||
93 | A fault is detected if the two pins for the corresponding | ||
94 | sensor are open or shorted, or any of the two is shorted | ||
95 | to ground or Vcc. '1' indicates a diode fault. | ||
96 | |||
97 | cpu0_vid - CPU voltage as received from the CPU | ||
98 | |||
99 | vrm - CPU VID standard used for decoding CPU voltage | ||
100 | |||
101 | The *_min, *_max, *_offset and vrm files can be read and | ||
102 | written, all others are read-only. | ||
diff --git a/Documentation/hwmon/sysfs-interface b/Documentation/hwmon/sysfs-interface index a0d0ab24288e..d1d390aaf620 100644 --- a/Documentation/hwmon/sysfs-interface +++ b/Documentation/hwmon/sysfs-interface | |||
@@ -3,15 +3,15 @@ Naming and data format standards for sysfs files | |||
3 | 3 | ||
4 | The libsensors library offers an interface to the raw sensors data | 4 | The libsensors library offers an interface to the raw sensors data |
5 | through the sysfs interface. See libsensors documentation and source for | 5 | through the sysfs interface. See libsensors documentation and source for |
6 | more further information. As of writing this document, libsensors | 6 | further information. As of writing this document, libsensors |
7 | (from lm_sensors 2.8.3) is heavily chip-dependant. Adding or updating | 7 | (from lm_sensors 2.8.3) is heavily chip-dependent. Adding or updating |
8 | support for any given chip requires modifying the library's code. | 8 | support for any given chip requires modifying the library's code. |
9 | This is because libsensors was written for the procfs interface | 9 | This is because libsensors was written for the procfs interface |
10 | older kernel modules were using, which wasn't standardized enough. | 10 | older kernel modules were using, which wasn't standardized enough. |
11 | Recent versions of libsensors (from lm_sensors 2.8.2 and later) have | 11 | Recent versions of libsensors (from lm_sensors 2.8.2 and later) have |
12 | support for the sysfs interface, though. | 12 | support for the sysfs interface, though. |
13 | 13 | ||
14 | The new sysfs interface was designed to be as chip-independant as | 14 | The new sysfs interface was designed to be as chip-independent as |
15 | possible. | 15 | possible. |
16 | 16 | ||
17 | Note that motherboards vary widely in the connections to sensor chips. | 17 | Note that motherboards vary widely in the connections to sensor chips. |
@@ -24,7 +24,7 @@ range using external resistors. Since the values of these resistors | |||
24 | can change from motherboard to motherboard, the conversions cannot be | 24 | can change from motherboard to motherboard, the conversions cannot be |
25 | hard coded into the driver and have to be done in user space. | 25 | hard coded into the driver and have to be done in user space. |
26 | 26 | ||
27 | For this reason, even if we aim at a chip-independant libsensors, it will | 27 | For this reason, even if we aim at a chip-independent libsensors, it will |
28 | still require a configuration file (e.g. /etc/sensors.conf) for proper | 28 | still require a configuration file (e.g. /etc/sensors.conf) for proper |
29 | values conversion, labeling of inputs and hiding of unused inputs. | 29 | values conversion, labeling of inputs and hiding of unused inputs. |
30 | 30 | ||
@@ -39,15 +39,16 @@ If you are developing a userspace application please send us feedback on | |||
39 | this standard. | 39 | this standard. |
40 | 40 | ||
41 | Note that this standard isn't completely established yet, so it is subject | 41 | Note that this standard isn't completely established yet, so it is subject |
42 | to changes, even important ones. One more reason to use the library instead | 42 | to changes. If you are writing a new hardware monitoring driver those |
43 | of accessing sysfs files directly. | 43 | features can't seem to fit in this interface, please contact us with your |
44 | extension proposal. Keep in mind that backward compatibility must be | ||
45 | preserved. | ||
44 | 46 | ||
45 | Each chip gets its own directory in the sysfs /sys/devices tree. To | 47 | Each chip gets its own directory in the sysfs /sys/devices tree. To |
46 | find all sensor chips, it is easier to follow the symlinks from | 48 | find all sensor chips, it is easier to follow the device symlinks from |
47 | /sys/i2c/devices/ | 49 | /sys/class/hwmon/hwmon*. |
48 | 50 | ||
49 | All sysfs values are fixed point numbers. To get the true value of some | 51 | All sysfs values are fixed point numbers. |
50 | of the values, you should divide by the specified value. | ||
51 | 52 | ||
52 | There is only one value per file, unlike the older /proc specification. | 53 | There is only one value per file, unlike the older /proc specification. |
53 | The common scheme for files naming is: <type><number>_<item>. Usual | 54 | The common scheme for files naming is: <type><number>_<item>. Usual |
@@ -69,28 +70,40 @@ to cause an alarm) is chip-dependent. | |||
69 | 70 | ||
70 | ------------------------------------------------------------------------- | 71 | ------------------------------------------------------------------------- |
71 | 72 | ||
73 | [0-*] denotes any positive number starting from 0 | ||
74 | [1-*] denotes any positive number starting from 1 | ||
75 | RO read only value | ||
76 | RW read/write value | ||
77 | |||
78 | Read/write values may be read-only for some chips, depending on the | ||
79 | hardware implementation. | ||
80 | |||
81 | All entries are optional, and should only be created in a given driver | ||
82 | if the chip has the feature. | ||
83 | |||
72 | ************ | 84 | ************ |
73 | * Voltages * | 85 | * Voltages * |
74 | ************ | 86 | ************ |
75 | 87 | ||
76 | in[0-8]_min Voltage min value. | 88 | in[0-*]_min Voltage min value. |
77 | Unit: millivolt | 89 | Unit: millivolt |
78 | Read/Write | 90 | RW |
79 | 91 | ||
80 | in[0-8]_max Voltage max value. | 92 | in[0-*]_max Voltage max value. |
81 | Unit: millivolt | 93 | Unit: millivolt |
82 | Read/Write | 94 | RW |
83 | 95 | ||
84 | in[0-8]_input Voltage input value. | 96 | in[0-*]_input Voltage input value. |
85 | Unit: millivolt | 97 | Unit: millivolt |
86 | Read only | 98 | RO |
99 | Voltage measured on the chip pin. | ||
87 | Actual voltage depends on the scaling resistors on the | 100 | Actual voltage depends on the scaling resistors on the |
88 | motherboard, as recommended in the chip datasheet. | 101 | motherboard, as recommended in the chip datasheet. |
89 | This varies by chip and by motherboard. | 102 | This varies by chip and by motherboard. |
90 | Because of this variation, values are generally NOT scaled | 103 | Because of this variation, values are generally NOT scaled |
91 | by the chip driver, and must be done by the application. | 104 | by the chip driver, and must be done by the application. |
92 | However, some drivers (notably lm87 and via686a) | 105 | However, some drivers (notably lm87 and via686a) |
93 | do scale, with various degrees of success. | 106 | do scale, because of internal resistors built into a chip. |
94 | These drivers will output the actual voltage. | 107 | These drivers will output the actual voltage. |
95 | 108 | ||
96 | Typical usage: | 109 | Typical usage: |
@@ -104,58 +117,72 @@ in[0-8]_input Voltage input value. | |||
104 | in7_* varies | 117 | in7_* varies |
105 | in8_* varies | 118 | in8_* varies |
106 | 119 | ||
107 | cpu[0-1]_vid CPU core reference voltage. | 120 | cpu[0-*]_vid CPU core reference voltage. |
108 | Unit: millivolt | 121 | Unit: millivolt |
109 | Read only. | 122 | RO |
110 | Not always correct. | 123 | Not always correct. |
111 | 124 | ||
112 | vrm Voltage Regulator Module version number. | 125 | vrm Voltage Regulator Module version number. |
113 | Read only. | 126 | RW (but changing it should no more be necessary) |
114 | Two digit number, first is major version, second is | 127 | Originally the VRM standard version multiplied by 10, but now |
115 | minor version. | 128 | an arbitrary number, as not all standards have a version |
129 | number. | ||
116 | Affects the way the driver calculates the CPU core reference | 130 | Affects the way the driver calculates the CPU core reference |
117 | voltage from the vid pins. | 131 | voltage from the vid pins. |
118 | 132 | ||
133 | Also see the Alarms section for status flags associated with voltages. | ||
134 | |||
119 | 135 | ||
120 | ******** | 136 | ******** |
121 | * Fans * | 137 | * Fans * |
122 | ******** | 138 | ******** |
123 | 139 | ||
124 | fan[1-3]_min Fan minimum value | 140 | fan[1-*]_min Fan minimum value |
125 | Unit: revolution/min (RPM) | 141 | Unit: revolution/min (RPM) |
126 | Read/Write. | 142 | RW |
127 | 143 | ||
128 | fan[1-3]_input Fan input value. | 144 | fan[1-*]_input Fan input value. |
129 | Unit: revolution/min (RPM) | 145 | Unit: revolution/min (RPM) |
130 | Read only. | 146 | RO |
131 | 147 | ||
132 | fan[1-3]_div Fan divisor. | 148 | fan[1-*]_div Fan divisor. |
133 | Integer value in powers of two (1, 2, 4, 8, 16, 32, 64, 128). | 149 | Integer value in powers of two (1, 2, 4, 8, 16, 32, 64, 128). |
150 | RW | ||
134 | Some chips only support values 1, 2, 4 and 8. | 151 | Some chips only support values 1, 2, 4 and 8. |
135 | Note that this is actually an internal clock divisor, which | 152 | Note that this is actually an internal clock divisor, which |
136 | affects the measurable speed range, not the read value. | 153 | affects the measurable speed range, not the read value. |
137 | 154 | ||
155 | Also see the Alarms section for status flags associated with fans. | ||
156 | |||
157 | |||
138 | ******* | 158 | ******* |
139 | * PWM * | 159 | * PWM * |
140 | ******* | 160 | ******* |
141 | 161 | ||
142 | pwm[1-3] Pulse width modulation fan control. | 162 | pwm[1-*] Pulse width modulation fan control. |
143 | Integer value in the range 0 to 255 | 163 | Integer value in the range 0 to 255 |
144 | Read/Write | 164 | RW |
145 | 255 is max or 100%. | 165 | 255 is max or 100%. |
146 | 166 | ||
147 | pwm[1-3]_enable | 167 | pwm[1-*]_enable |
148 | Switch PWM on and off. | 168 | Switch PWM on and off. |
149 | Not always present even if fan*_pwm is. | 169 | Not always present even if fan*_pwm is. |
150 | 0 to turn off | 170 | 0: turn off |
151 | 1 to turn on in manual mode | 171 | 1: turn on in manual mode |
152 | 2 to turn on in automatic mode | 172 | 2+: turn on in automatic mode |
153 | Read/Write | 173 | Check individual chip documentation files for automatic mode details. |
174 | RW | ||
175 | |||
176 | pwm[1-*]_mode | ||
177 | 0: DC mode | ||
178 | 1: PWM mode | ||
179 | RW | ||
154 | 180 | ||
155 | pwm[1-*]_auto_channels_temp | 181 | pwm[1-*]_auto_channels_temp |
156 | Select which temperature channels affect this PWM output in | 182 | Select which temperature channels affect this PWM output in |
157 | auto mode. Bitfield, 1 is temp1, 2 is temp2, 4 is temp3 etc... | 183 | auto mode. Bitfield, 1 is temp1, 2 is temp2, 4 is temp3 etc... |
158 | Which values are possible depend on the chip used. | 184 | Which values are possible depend on the chip used. |
185 | RW | ||
159 | 186 | ||
160 | pwm[1-*]_auto_point[1-*]_pwm | 187 | pwm[1-*]_auto_point[1-*]_pwm |
161 | pwm[1-*]_auto_point[1-*]_temp | 188 | pwm[1-*]_auto_point[1-*]_temp |
@@ -163,6 +190,7 @@ pwm[1-*]_auto_point[1-*]_temp_hyst | |||
163 | Define the PWM vs temperature curve. Number of trip points is | 190 | Define the PWM vs temperature curve. Number of trip points is |
164 | chip-dependent. Use this for chips which associate trip points | 191 | chip-dependent. Use this for chips which associate trip points |
165 | to PWM output channels. | 192 | to PWM output channels. |
193 | RW | ||
166 | 194 | ||
167 | OR | 195 | OR |
168 | 196 | ||
@@ -172,50 +200,57 @@ temp[1-*]_auto_point[1-*]_temp_hyst | |||
172 | Define the PWM vs temperature curve. Number of trip points is | 200 | Define the PWM vs temperature curve. Number of trip points is |
173 | chip-dependent. Use this for chips which associate trip points | 201 | chip-dependent. Use this for chips which associate trip points |
174 | to temperature channels. | 202 | to temperature channels. |
203 | RW | ||
175 | 204 | ||
176 | 205 | ||
177 | **************** | 206 | **************** |
178 | * Temperatures * | 207 | * Temperatures * |
179 | **************** | 208 | **************** |
180 | 209 | ||
181 | temp[1-3]_type Sensor type selection. | 210 | temp[1-*]_type Sensor type selection. |
182 | Integers 1 to 4 or thermistor Beta value (typically 3435) | 211 | Integers 1 to 4 or thermistor Beta value (typically 3435) |
183 | Read/Write. | 212 | RW |
184 | 1: PII/Celeron Diode | 213 | 1: PII/Celeron Diode |
185 | 2: 3904 transistor | 214 | 2: 3904 transistor |
186 | 3: thermal diode | 215 | 3: thermal diode |
187 | 4: thermistor (default/unknown Beta) | 216 | 4: thermistor (default/unknown Beta) |
188 | Not all types are supported by all chips | 217 | Not all types are supported by all chips |
189 | 218 | ||
190 | temp[1-4]_max Temperature max value. | 219 | temp[1-*]_max Temperature max value. |
191 | Unit: millidegree Celcius | 220 | Unit: millidegree Celsius (or millivolt, see below) |
192 | Read/Write value. | 221 | RW |
193 | 222 | ||
194 | temp[1-3]_min Temperature min value. | 223 | temp[1-*]_min Temperature min value. |
195 | Unit: millidegree Celcius | 224 | Unit: millidegree Celsius |
196 | Read/Write value. | 225 | RW |
197 | 226 | ||
198 | temp[1-3]_max_hyst | 227 | temp[1-*]_max_hyst |
199 | Temperature hysteresis value for max limit. | 228 | Temperature hysteresis value for max limit. |
200 | Unit: millidegree Celcius | 229 | Unit: millidegree Celsius |
201 | Must be reported as an absolute temperature, NOT a delta | 230 | Must be reported as an absolute temperature, NOT a delta |
202 | from the max value. | 231 | from the max value. |
203 | Read/Write value. | 232 | RW |
204 | 233 | ||
205 | temp[1-4]_input Temperature input value. | 234 | temp[1-*]_input Temperature input value. |
206 | Unit: millidegree Celcius | 235 | Unit: millidegree Celsius |
207 | Read only value. | 236 | RO |
208 | 237 | ||
209 | temp[1-4]_crit Temperature critical value, typically greater than | 238 | temp[1-*]_crit Temperature critical value, typically greater than |
210 | corresponding temp_max values. | 239 | corresponding temp_max values. |
211 | Unit: millidegree Celcius | 240 | Unit: millidegree Celsius |
212 | Read/Write value. | 241 | RW |
213 | 242 | ||
214 | temp[1-2]_crit_hyst | 243 | temp[1-*]_crit_hyst |
215 | Temperature hysteresis value for critical limit. | 244 | Temperature hysteresis value for critical limit. |
216 | Unit: millidegree Celcius | 245 | Unit: millidegree Celsius |
217 | Must be reported as an absolute temperature, NOT a delta | 246 | Must be reported as an absolute temperature, NOT a delta |
218 | from the critical value. | 247 | from the critical value. |
248 | RW | ||
249 | |||
250 | temp[1-4]_offset | ||
251 | Temperature offset which is added to the temperature reading | ||
252 | by the chip. | ||
253 | Unit: millidegree Celsius | ||
219 | Read/Write value. | 254 | Read/Write value. |
220 | 255 | ||
221 | If there are multiple temperature sensors, temp1_* is | 256 | If there are multiple temperature sensors, temp1_* is |
@@ -225,6 +260,17 @@ temp[1-2]_crit_hyst | |||
225 | itself, for example the thermal diode inside the CPU or | 260 | itself, for example the thermal diode inside the CPU or |
226 | a thermistor nearby. | 261 | a thermistor nearby. |
227 | 262 | ||
263 | Some chips measure temperature using external thermistors and an ADC, and | ||
264 | report the temperature measurement as a voltage. Converting this voltage | ||
265 | back to a temperature (or the other way around for limits) requires | ||
266 | mathematical functions not available in the kernel, so the conversion | ||
267 | must occur in user space. For these chips, all temp* files described | ||
268 | above should contain values expressed in millivolt instead of millidegree | ||
269 | Celsius. In other words, such temperature channels are handled as voltage | ||
270 | channels by the driver. | ||
271 | |||
272 | Also see the Alarms section for status flags associated with temperatures. | ||
273 | |||
228 | 274 | ||
229 | ************ | 275 | ************ |
230 | * Currents * | 276 | * Currents * |
@@ -233,25 +279,88 @@ temp[1-2]_crit_hyst | |||
233 | Note that no known chip provides current measurements as of writing, | 279 | Note that no known chip provides current measurements as of writing, |
234 | so this part is theoretical, so to say. | 280 | so this part is theoretical, so to say. |
235 | 281 | ||
236 | curr[1-n]_max Current max value | 282 | curr[1-*]_max Current max value |
237 | Unit: milliampere | 283 | Unit: milliampere |
238 | Read/Write. | 284 | RW |
239 | 285 | ||
240 | curr[1-n]_min Current min value. | 286 | curr[1-*]_min Current min value. |
241 | Unit: milliampere | 287 | Unit: milliampere |
242 | Read/Write. | 288 | RW |
243 | 289 | ||
244 | curr[1-n]_input Current input value | 290 | curr[1-*]_input Current input value |
245 | Unit: milliampere | 291 | Unit: milliampere |
246 | Read only. | 292 | RO |
247 | 293 | ||
248 | 294 | ||
249 | ********* | 295 | ********** |
250 | * Other * | 296 | * Alarms * |
251 | ********* | 297 | ********** |
298 | |||
299 | Each channel or limit may have an associated alarm file, containing a | ||
300 | boolean value. 1 means than an alarm condition exists, 0 means no alarm. | ||
301 | |||
302 | Usually a given chip will either use channel-related alarms, or | ||
303 | limit-related alarms, not both. The driver should just reflect the hardware | ||
304 | implementation. | ||
305 | |||
306 | in[0-*]_alarm | ||
307 | fan[1-*]_alarm | ||
308 | temp[1-*]_alarm | ||
309 | Channel alarm | ||
310 | 0: no alarm | ||
311 | 1: alarm | ||
312 | RO | ||
313 | |||
314 | OR | ||
315 | |||
316 | in[0-*]_min_alarm | ||
317 | in[0-*]_max_alarm | ||
318 | fan[1-*]_min_alarm | ||
319 | temp[1-*]_min_alarm | ||
320 | temp[1-*]_max_alarm | ||
321 | temp[1-*]_crit_alarm | ||
322 | Limit alarm | ||
323 | 0: no alarm | ||
324 | 1: alarm | ||
325 | RO | ||
326 | |||
327 | Each input channel may have an associated fault file. This can be used | ||
328 | to notify open diodes, unconnected fans etc. where the hardware | ||
329 | supports it. When this boolean has value 1, the measurement for that | ||
330 | channel should not be trusted. | ||
331 | |||
332 | in[0-*]_input_fault | ||
333 | fan[1-*]_input_fault | ||
334 | temp[1-*]_input_fault | ||
335 | Input fault condition | ||
336 | 0: no fault occured | ||
337 | 1: fault condition | ||
338 | RO | ||
339 | |||
340 | Some chips also offer the possibility to get beeped when an alarm occurs: | ||
341 | |||
342 | beep_enable Master beep enable | ||
343 | 0: no beeps | ||
344 | 1: beeps | ||
345 | RW | ||
346 | |||
347 | in[0-*]_beep | ||
348 | fan[1-*]_beep | ||
349 | temp[1-*]_beep | ||
350 | Channel beep | ||
351 | 0: disable | ||
352 | 1: enable | ||
353 | RW | ||
354 | |||
355 | In theory, a chip could provide per-limit beep masking, but no such chip | ||
356 | was seen so far. | ||
357 | |||
358 | Old drivers provided a different, non-standard interface to alarms and | ||
359 | beeps. These interface files are deprecated, but will be kept around | ||
360 | for compatibility reasons: | ||
252 | 361 | ||
253 | alarms Alarm bitmask. | 362 | alarms Alarm bitmask. |
254 | Read only. | 363 | RO |
255 | Integer representation of one to four bytes. | 364 | Integer representation of one to four bytes. |
256 | A '1' bit means an alarm. | 365 | A '1' bit means an alarm. |
257 | Chips should be programmed for 'comparator' mode so that | 366 | Chips should be programmed for 'comparator' mode so that |
@@ -259,35 +368,26 @@ alarms Alarm bitmask. | |||
259 | if it is still valid. | 368 | if it is still valid. |
260 | Generally a direct representation of a chip's internal | 369 | Generally a direct representation of a chip's internal |
261 | alarm registers; there is no standard for the position | 370 | alarm registers; there is no standard for the position |
262 | of individual bits. | 371 | of individual bits. For this reason, the use of this |
372 | interface file for new drivers is discouraged. Use | ||
373 | individual *_alarm and *_fault files instead. | ||
263 | Bits are defined in kernel/include/sensors.h. | 374 | Bits are defined in kernel/include/sensors.h. |
264 | 375 | ||
265 | alarms_in Alarm bitmask relative to in (voltage) channels | 376 | beep_mask Bitmask for beep. |
266 | Read only | 377 | Same format as 'alarms' with the same bit locations, |
267 | A '1' bit means an alarm, LSB corresponds to in0 and so on | 378 | use discouraged for the same reason. Use individual |
268 | Prefered to 'alarms' for newer chips | 379 | *_beep files instead. |
269 | 380 | RW | |
270 | alarms_fan Alarm bitmask relative to fan channels | ||
271 | Read only | ||
272 | A '1' bit means an alarm, LSB corresponds to fan1 and so on | ||
273 | Prefered to 'alarms' for newer chips | ||
274 | |||
275 | alarms_temp Alarm bitmask relative to temp (temperature) channels | ||
276 | Read only | ||
277 | A '1' bit means an alarm, LSB corresponds to temp1 and so on | ||
278 | Prefered to 'alarms' for newer chips | ||
279 | 381 | ||
280 | beep_enable Beep/interrupt enable | ||
281 | 0 to disable. | ||
282 | 1 to enable. | ||
283 | Read/Write | ||
284 | 382 | ||
285 | beep_mask Bitmask for beep. | 383 | ********* |
286 | Same format as 'alarms' with the same bit locations. | 384 | * Other * |
287 | Read/Write | 385 | ********* |
288 | 386 | ||
289 | eeprom Raw EEPROM data in binary form. | 387 | eeprom Raw EEPROM data in binary form. |
290 | Read only. | 388 | RO |
291 | 389 | ||
292 | pec Enable or disable PEC (SMBus only) | 390 | pec Enable or disable PEC (SMBus only) |
293 | Read/Write | 391 | 0: disable |
392 | 1: enable | ||
393 | RW | ||
diff --git a/Documentation/hwmon/userspace-tools b/Documentation/hwmon/userspace-tools index 2622aac65422..19900a8fe679 100644 --- a/Documentation/hwmon/userspace-tools +++ b/Documentation/hwmon/userspace-tools | |||
@@ -6,31 +6,32 @@ voltages, fans speed). They are often connected through an I2C bus, but some | |||
6 | are also connected directly through the ISA bus. | 6 | are also connected directly through the ISA bus. |
7 | 7 | ||
8 | The kernel drivers make the data from the sensor chips available in the /sys | 8 | The kernel drivers make the data from the sensor chips available in the /sys |
9 | virtual filesystem. Userspace tools are then used to display or set or the | 9 | virtual filesystem. Userspace tools are then used to display the measured |
10 | data in a more friendly manner. | 10 | values or configure the chips in a more friendly manner. |
11 | 11 | ||
12 | Lm-sensors | 12 | Lm-sensors |
13 | ---------- | 13 | ---------- |
14 | 14 | ||
15 | Core set of utilites that will allow you to obtain health information, | 15 | Core set of utilities that will allow you to obtain health information, |
16 | setup monitoring limits etc. You can get them on their homepage | 16 | setup monitoring limits etc. You can get them on their homepage |
17 | http://www.lm-sensors.nu/ or as a package from your Linux distribution. | 17 | http://www.lm-sensors.nu/ or as a package from your Linux distribution. |
18 | 18 | ||
19 | If from website: | 19 | If from website: |
20 | Get lmsensors from project web site. Please note, you need only userspace | 20 | Get lm-sensors from project web site. Please note, you need only userspace |
21 | part, so compile with "make user_install" target. | 21 | part, so compile with "make user" and install with "make user_install". |
22 | 22 | ||
23 | General hints to get things working: | 23 | General hints to get things working: |
24 | 24 | ||
25 | 0) get lm-sensors userspace utils | 25 | 0) get lm-sensors userspace utils |
26 | 1) compile all drivers in I2C section as modules in your kernel | 26 | 1) compile all drivers in I2C and Hardware Monitoring sections as modules |
27 | in your kernel | ||
27 | 2) run sensors-detect script, it will tell you what modules you need to load. | 28 | 2) run sensors-detect script, it will tell you what modules you need to load. |
28 | 3) load them and run "sensors" command, you should see some results. | 29 | 3) load them and run "sensors" command, you should see some results. |
29 | 4) fix sensors.conf, labels, limits, fan divisors | 30 | 4) fix sensors.conf, labels, limits, fan divisors |
30 | 5) if any more problems consult FAQ, or documentation | 31 | 5) if any more problems consult FAQ, or documentation |
31 | 32 | ||
32 | Other utilites | 33 | Other utilities |
33 | -------------- | 34 | --------------- |
34 | 35 | ||
35 | If you want some graphical indicators of system health look for applications | 36 | If you want some graphical indicators of system health look for applications |
36 | like: gkrellm, ksensors, xsensors, wmtemp, wmsensors, wmgtemp, ksysguardd, | 37 | like: gkrellm, ksensors, xsensors, wmtemp, wmsensors, wmgtemp, ksysguardd, |
diff --git a/Documentation/hwmon/w83791d b/Documentation/hwmon/w83791d new file mode 100644 index 000000000000..83a3836289c2 --- /dev/null +++ b/Documentation/hwmon/w83791d | |||
@@ -0,0 +1,113 @@ | |||
1 | Kernel driver w83791d | ||
2 | ===================== | ||
3 | |||
4 | Supported chips: | ||
5 | * Winbond W83791D | ||
6 | Prefix: 'w83791d' | ||
7 | Addresses scanned: I2C 0x2c - 0x2f | ||
8 | Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83791Da.pdf | ||
9 | |||
10 | Author: Charles Spirakis <bezaur@gmail.com> | ||
11 | |||
12 | This driver was derived from the w83781d.c and w83792d.c source files. | ||
13 | |||
14 | Credits: | ||
15 | w83781d.c: | ||
16 | Frodo Looijaard <frodol@dds.nl>, | ||
17 | Philip Edelbrock <phil@netroedge.com>, | ||
18 | and Mark Studebaker <mdsxyz123@yahoo.com> | ||
19 | w83792d.c: | ||
20 | Chunhao Huang <DZShen@Winbond.com.tw>, | ||
21 | Rudolf Marek <r.marek@sh.cvut.cz> | ||
22 | |||
23 | Module Parameters | ||
24 | ----------------- | ||
25 | |||
26 | * init boolean | ||
27 | (default 0) | ||
28 | Use 'init=1' to have the driver do extra software initializations. | ||
29 | The default behavior is to do the minimum initialization possible | ||
30 | and depend on the BIOS to properly setup the chip. If you know you | ||
31 | have a w83791d and you're having problems, try init=1 before trying | ||
32 | reset=1. | ||
33 | |||
34 | * reset boolean | ||
35 | (default 0) | ||
36 | Use 'reset=1' to reset the chip (via index 0x40, bit 7). The default | ||
37 | behavior is no chip reset to preserve BIOS settings. | ||
38 | |||
39 | * force_subclients=bus,caddr,saddr,saddr | ||
40 | This is used to force the i2c addresses for subclients of | ||
41 | a certain chip. Example usage is `force_subclients=0,0x2f,0x4a,0x4b' | ||
42 | to force the subclients of chip 0x2f on bus 0 to i2c addresses | ||
43 | 0x4a and 0x4b. | ||
44 | |||
45 | |||
46 | Description | ||
47 | ----------- | ||
48 | |||
49 | This driver implements support for the Winbond W83791D chip. | ||
50 | |||
51 | Detection of the chip can sometimes be foiled because it can be in an | ||
52 | internal state that allows no clean access (Bank with ID register is not | ||
53 | currently selected). If you know the address of the chip, use a 'force' | ||
54 | parameter; this will put it into a more well-behaved state first. | ||
55 | |||
56 | The driver implements three temperature sensors, five fan rotation speed | ||
57 | sensors, and ten voltage sensors. | ||
58 | |||
59 | Temperatures are measured in degrees Celsius and measurement resolution is 1 | ||
60 | degC for temp1 and 0.5 degC for temp2 and temp3. An alarm is triggered when | ||
61 | the temperature gets higher than the Overtemperature Shutdown value; it stays | ||
62 | on until the temperature falls below the Hysteresis value. | ||
63 | |||
64 | Fan rotation speeds are reported in RPM (rotations per minute). An alarm is | ||
65 | triggered if the rotation speed has dropped below a programmable limit. Fan | ||
66 | readings can be divided by a programmable divider (1, 2, 4, 8 for fan 1/2/3 | ||
67 | and 1, 2, 4, 8, 16, 32, 64 or 128 for fan 4/5) to give the readings more | ||
68 | range or accuracy. | ||
69 | |||
70 | Voltage sensors (also known as IN sensors) report their values in millivolts. | ||
71 | An alarm is triggered if the voltage has crossed a programmable minimum | ||
72 | or maximum limit. | ||
73 | |||
74 | Alarms are provided as output from a "realtime status register". The | ||
75 | following bits are defined: | ||
76 | |||
77 | bit - alarm on: | ||
78 | 0 - Vcore | ||
79 | 1 - VINR0 | ||
80 | 2 - +3.3VIN | ||
81 | 3 - 5VDD | ||
82 | 4 - temp1 | ||
83 | 5 - temp2 | ||
84 | 6 - fan1 | ||
85 | 7 - fan2 | ||
86 | 8 - +12VIN | ||
87 | 9 - -12VIN | ||
88 | 10 - -5VIN | ||
89 | 11 - fan3 | ||
90 | 12 - chassis | ||
91 | 13 - temp3 | ||
92 | 14 - VINR1 | ||
93 | 15 - reserved | ||
94 | 16 - tart1 | ||
95 | 17 - tart2 | ||
96 | 18 - tart3 | ||
97 | 19 - VSB | ||
98 | 20 - VBAT | ||
99 | 21 - fan4 | ||
100 | 22 - fan5 | ||
101 | 23 - reserved | ||
102 | |||
103 | When an alarm goes off, you can be warned by a beeping signal through your | ||
104 | computer speaker. It is possible to enable all beeping globally, or only | ||
105 | the beeping for some alarms. | ||
106 | |||
107 | The driver only reads the chip values each 3 seconds; reading them more | ||
108 | often will do no harm, but will return 'old' values. | ||
109 | |||
110 | W83791D TODO: | ||
111 | --------------- | ||
112 | Provide a patch for per-file alarms as discussed on the mailing list | ||
113 | Provide a patch for smart-fan control (still need appropriate motherboard/fans) | ||
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index fd4b2712d570..e46c23458242 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 | |||
@@ -21,8 +21,7 @@ Authors: | |||
21 | Module Parameters | 21 | Module Parameters |
22 | ----------------- | 22 | ----------------- |
23 | 23 | ||
24 | * force_addr: int | 24 | None. |
25 | Forcibly enable the ICH at the given address. EXTREMELY DANGEROUS! | ||
26 | 25 | ||
27 | 26 | ||
28 | Description | 27 | Description |
diff --git a/Documentation/i2c/busses/i2c-nforce2 b/Documentation/i2c/busses/i2c-nforce2 index d751282d9b2a..cd49c428a3ab 100644 --- a/Documentation/i2c/busses/i2c-nforce2 +++ b/Documentation/i2c/busses/i2c-nforce2 | |||
@@ -7,6 +7,8 @@ Supported adapters: | |||
7 | * nForce3 250Gb MCP 10de:00E4 | 7 | * nForce3 250Gb MCP 10de:00E4 |
8 | * nForce4 MCP 10de:0052 | 8 | * nForce4 MCP 10de:0052 |
9 | * nForce4 MCP-04 10de:0034 | 9 | * nForce4 MCP-04 10de:0034 |
10 | * nForce4 MCP51 10de:0264 | ||
11 | * nForce4 MCP55 10de:0368 | ||
10 | 12 | ||
11 | Datasheet: not publically available, but seems to be similar to the | 13 | Datasheet: not publically available, but seems to be similar to the |
12 | AMD-8111 SMBus 2.0 adapter. | 14 | AMD-8111 SMBus 2.0 adapter. |
diff --git a/Documentation/i2c/busses/i2c-ocores b/Documentation/i2c/busses/i2c-ocores new file mode 100644 index 000000000000..cfcebb10d14e --- /dev/null +++ b/Documentation/i2c/busses/i2c-ocores | |||
@@ -0,0 +1,51 @@ | |||
1 | Kernel driver i2c-ocores | ||
2 | |||
3 | Supported adapters: | ||
4 | * OpenCores.org I2C controller by Richard Herveille (see datasheet link) | ||
5 | Datasheet: http://www.opencores.org/projects.cgi/web/i2c/overview | ||
6 | |||
7 | Author: Peter Korsgaard <jacmet@sunsite.dk> | ||
8 | |||
9 | Description | ||
10 | ----------- | ||
11 | |||
12 | i2c-ocores is an i2c bus driver for the OpenCores.org I2C controller | ||
13 | IP core by Richard Herveille. | ||
14 | |||
15 | Usage | ||
16 | ----- | ||
17 | |||
18 | i2c-ocores uses the platform bus, so you need to provide a struct | ||
19 | platform_device with the base address and interrupt number. The | ||
20 | dev.platform_data of the device should also point to a struct | ||
21 | ocores_i2c_platform_data (see linux/i2c-ocores.h) describing the | ||
22 | distance between registers and the input clock speed. | ||
23 | |||
24 | E.G. something like: | ||
25 | |||
26 | static struct resource ocores_resources[] = { | ||
27 | [0] = { | ||
28 | .start = MYI2C_BASEADDR, | ||
29 | .end = MYI2C_BASEADDR + 8, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = MYI2C_IRQ, | ||
34 | .end = MYI2C_IRQ, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | static struct ocores_i2c_platform_data myi2c_data = { | ||
40 | .regstep = 2, /* two bytes between registers */ | ||
41 | .clock_khz = 50000, /* input clock of 50MHz */ | ||
42 | }; | ||
43 | |||
44 | static struct platform_device myi2c = { | ||
45 | .name = "ocores-i2c", | ||
46 | .dev = { | ||
47 | .platform_data = &myi2c_data, | ||
48 | }, | ||
49 | .num_resources = ARRAY_SIZE(ocores_resources), | ||
50 | .resource = ocores_resources, | ||
51 | }; | ||
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index a1c8f581afed..921476333235 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 | |||
@@ -6,6 +6,8 @@ Supported adapters: | |||
6 | Datasheet: Publicly available at the Intel website | 6 | Datasheet: Publicly available at the Intel website |
7 | * ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges | 7 | * ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges |
8 | Datasheet: Only available via NDA from ServerWorks | 8 | Datasheet: Only available via NDA from ServerWorks |
9 | * ATI IXP southbridges IXP200, IXP300, IXP400 | ||
10 | Datasheet: Not publicly available | ||
9 | * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge | 11 | * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge |
10 | Datasheet: Publicly available at the SMSC website http://www.smsc.com | 12 | Datasheet: Publicly available at the SMSC website http://www.smsc.com |
11 | 13 | ||
@@ -21,8 +23,6 @@ Module Parameters | |||
21 | Forcibly enable the PIIX4. DANGEROUS! | 23 | Forcibly enable the PIIX4. DANGEROUS! |
22 | * force_addr: int | 24 | * force_addr: int |
23 | Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! | 25 | Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! |
24 | * fix_hstcfg: int | ||
25 | Fix config register. Needed on some boards (Force CPCI735). | ||
26 | 26 | ||
27 | 27 | ||
28 | Description | 28 | Description |
@@ -63,10 +63,36 @@ The PIIX4E is just an new version of the PIIX4; it is supported as well. | |||
63 | The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use | 63 | The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use |
64 | this driver on those mainboards. | 64 | this driver on those mainboards. |
65 | 65 | ||
66 | The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are | 66 | The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are |
67 | identical to the PIIX4 in I2C/SMBus support. | 67 | identical to the PIIX4 in I2C/SMBus support. |
68 | 68 | ||
69 | A few OSB4 southbridges are known to be misconfigured by the BIOS. In this | 69 | If you own Force CPCI735 motherboard or other OSB4 based systems you may need |
70 | case, you have you use the fix_hstcfg module parameter. Do not use it | 70 | to change the SMBus Interrupt Select register so the SMBus controller uses |
71 | unless you know you have to, because in some cases it also breaks | 71 | the SMI mode. |
72 | configuration on southbridges that don't need it. | 72 | |
73 | 1) Use lspci command and locate the PCI device with the SMBus controller: | ||
74 | 00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f) | ||
75 | The line may vary for different chipsets. Please consult the driver source | ||
76 | for all possible PCI ids (and lspci -n to match them). Lets assume the | ||
77 | device is located at 00:0f.0. | ||
78 | 2) Now you just need to change the value in 0xD2 register. Get it first with | ||
79 | command: lspci -xxx -s 00:0f.0 | ||
80 | If the value is 0x3 then you need to change it to 0x1 | ||
81 | setpci -s 00:0f.0 d2.b=1 | ||
82 | |||
83 | Please note that you don't need to do that in all cases, just when the SMBus is | ||
84 | not working properly. | ||
85 | |||
86 | |||
87 | Hardware-specific issues | ||
88 | ------------------------ | ||
89 | |||
90 | This driver will refuse to load on IBM systems with an Intel PIIX4 SMBus. | ||
91 | Some of these machines have an RFID EEPROM (24RF08) connected to the SMBus, | ||
92 | which can easily get corrupted due to a state machine bug. These are mostly | ||
93 | Thinkpad laptops, but desktop systems may also be affected. We have no list | ||
94 | of all affected systems, so the only safe solution was to prevent access to | ||
95 | the SMBus on all IBM systems (detected using DMI data.) | ||
96 | |||
97 | For additional information, read: | ||
98 | http://www2.lm-sensors.nu/~lm78/cvs/lm_sensors2/README.thinkpad | ||
diff --git a/Documentation/i2c/busses/scx200_acb b/Documentation/i2c/busses/scx200_acb index f50e69981ec6..7c07883d4dfc 100644 --- a/Documentation/i2c/busses/scx200_acb +++ b/Documentation/i2c/busses/scx200_acb | |||
@@ -2,14 +2,31 @@ Kernel driver scx200_acb | |||
2 | 2 | ||
3 | Author: Christer Weinigel <wingel@nano-system.com> | 3 | Author: Christer Weinigel <wingel@nano-system.com> |
4 | 4 | ||
5 | The driver supersedes the older, never merged driver named i2c-nscacb. | ||
6 | |||
5 | Module Parameters | 7 | Module Parameters |
6 | ----------------- | 8 | ----------------- |
7 | 9 | ||
8 | * base: int | 10 | * base: up to 4 ints |
9 | Base addresses for the ACCESS.bus controllers on SCx200 and SC1100 devices | 11 | Base addresses for the ACCESS.bus controllers on SCx200 and SC1100 devices |
10 | 12 | ||
13 | By default the driver uses two base addresses 0x820 and 0x840. | ||
14 | If you want only one base address, specify the second as 0 so as to | ||
15 | override this default. | ||
16 | |||
11 | Description | 17 | Description |
12 | ----------- | 18 | ----------- |
13 | 19 | ||
14 | Enable the use of the ACCESS.bus controller on the Geode SCx200 and | 20 | Enable the use of the ACCESS.bus controller on the Geode SCx200 and |
15 | SC1100 processors and the CS5535 and CS5536 Geode companion devices. | 21 | SC1100 processors and the CS5535 and CS5536 Geode companion devices. |
22 | |||
23 | Device-specific notes | ||
24 | --------------------- | ||
25 | |||
26 | The SC1100 WRAP boards are known to use base addresses 0x810 and 0x820. | ||
27 | If the scx200_acb driver is built into the kernel, add the following | ||
28 | parameter to your boot command line: | ||
29 | scx200_acb.base=0x810,0x820 | ||
30 | If the scx200_acb driver is built as a module, add the following line to | ||
31 | the file /etc/modprobe.conf instead: | ||
32 | options scx200_acb base=0x810,0x820 | ||