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authorAnton Vorontsov <avorontsov@ru.mvista.com>2008-12-18 11:37:23 -0500
committerKumar Gala <galak@kernel.crashing.org>2008-12-30 12:13:44 -0500
commit94409d6e1088517b6d6c8e669c604cc86d08ac1b (patch)
tree742776bdb3139b49145daa2833f636b607eb45d4 /Documentation
parent1b9e89046c31fd39d08742915b6bd72f6c239608 (diff)
powerpc: Add device tree bindings for BCSR GPIO banks
The patch adds bindings for BCSR GPIO banks, the bindings are used to describe particular BCSR registers that act as simple GPIO controllers. These GPIO banks might control power switches, SPI chip-selects, LEDs, etc. While at it, also fix "length" spelling error in the PIXIS FPGA bindings. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/board.txt32
1 files changed, 31 insertions, 1 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/powerpc/dts-bindings/fsl/board.txt
index 81a917ef96e9..6c974d28eeb4 100644
--- a/Documentation/powerpc/dts-bindings/fsl/board.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/board.txt
@@ -18,7 +18,7 @@ This is the memory-mapped registers for on board FPGA.
18 18
19Required properities: 19Required properities:
20- compatible : should be "fsl,fpga-pixis". 20- compatible : should be "fsl,fpga-pixis".
21- reg : should contain the address and the lenght of the FPPGA register 21- reg : should contain the address and the length of the FPPGA register
22 set. 22 set.
23 23
24Example (MPC8610HPCD): 24Example (MPC8610HPCD):
@@ -27,3 +27,33 @@ Example (MPC8610HPCD):
27 compatible = "fsl,fpga-pixis"; 27 compatible = "fsl,fpga-pixis";
28 reg = <0xe8000000 32>; 28 reg = <0xe8000000 32>;
29 }; 29 };
30
31* Freescale BCSR GPIO banks
32
33Some BCSR registers act as simple GPIO controllers, each such
34register can be represented by the gpio-controller node.
35
36Required properities:
37- compatible : Should be "fsl,<board>-bcsr-gpio".
38- reg : Should contain the address and the length of the GPIO bank
39 register.
40- #gpio-cells : Should be two. The first cell is the pin number and the
41 second cell is used to specify optional paramters (currently unused).
42- gpio-controller : Marks the port as GPIO controller.
43
44Example:
45
46 bcsr@1,0 {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 compatible = "fsl,mpc8360mds-bcsr";
50 reg = <1 0 0x8000>;
51 ranges = <0 1 0 0x8000>;
52
53 bcsr13: gpio-controller@d {
54 #gpio-cells = <2>;
55 compatible = "fsl,mpc8360mds-bcsr-gpio";
56 reg = <0xd 1>;
57 gpio-controller;
58 };
59 };