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authorDinh Nguyen <dinguyen@altera.com>2012-07-11 16:13:16 -0400
committerArnd Bergmann <arnd@arndb.de>2012-07-12 11:26:09 -0400
commitcfda590178a16e2b5edb09e131460b3e64819807 (patch)
tree7104a9bb75d101dcdc82c331e9cdd075eab702dc /Documentation
parentbd0a521e88aa7a06ae7aabaed7ae196ed4ad867a (diff)
clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer
Make a common device tree glue for clocksource/dw_apb_timer. Move mach-picoxcell/time.c to be a generic device tree application of the dw_apb_timer. Configure mach-picoxcell to use the dw_apb_timer_of device tree implementation in drivers/clocksource. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/rtc/dw-apb.txt25
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt
new file mode 100644
index 000000000000..93e2b0f048e6
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
@@ -0,0 +1,25 @@
1* Designware APB timer
2
3Required properties:
4- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
5- reg: physical base address of the controller and length of memory mapped
6 region.
7- interrupts: IRQ line for the timer.
8- clock-frequency: The frequency in HZ of the timer.
9- clock-freq: For backwards compatibility with picoxcell
10
11Example:
12
13 timer1: timer@ffc09000 {
14 compatible = "snps,dw-apb-timer-sp";
15 interrupts = <0 168 4>;
16 clock-frequency = <200000000>;
17 reg = <0xffc09000 0x1000>;
18 };
19
20 timer2: timer@ffd00000 {
21 compatible = "snps,dw-apb-timer-osc";
22 interrupts = <0 169 4>;
23 clock-frequency = <200000000>;
24 reg = <0xffd00000 0x1000>;
25 };