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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-02-02 08:49:11 -0500
committerDavid S. Miller <davem@davemloft.net>2014-02-06 22:46:54 -0500
commit4dae1686782d52084893421b89ff1aa61e223aaf (patch)
treef6187e7927634175f487aecdf57880980893f97a /Documentation
parent028b86b7671d17eb9a614924eb46d5efb9db931a (diff)
net: ethernet: sunxi: Add new compatibles
The Allwinner A10 compatibles were following a slightly different compatible patterns than the rest of the SoCs for historical reasons. Add compatibles matching the other pattern to the ethernet driver for consistency, and keep the older one for backward compatibility. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt5
1 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
index b90bfcd138ff..863d5b8155c7 100644
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
@@ -1,7 +1,8 @@
1* Allwinner EMAC ethernet controller 1* Allwinner EMAC ethernet controller
2 2
3Required properties: 3Required properties:
4- compatible: should be "allwinner,sun4i-emac". 4- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
5 "allwinner,sun4i-emac")
5- reg: address and length of the register set for the device. 6- reg: address and length of the register set for the device.
6- interrupts: interrupt for the device 7- interrupts: interrupt for the device
7- phy: A phandle to a phy node defining the PHY address (as the reg 8- phy: A phandle to a phy node defining the PHY address (as the reg
@@ -14,7 +15,7 @@ Optional properties:
14Example: 15Example:
15 16
16emac: ethernet@01c0b000 { 17emac: ethernet@01c0b000 {
17 compatible = "allwinner,sun4i-emac"; 18 compatible = "allwinner,sun4i-a10-emac";
18 reg = <0x01c0b000 0x1000>; 19 reg = <0x01c0b000 0x1000>;
19 interrupts = <55>; 20 interrupts = <55>;
20 clocks = <&ahb_gates 17>; 21 clocks = <&ahb_gates 17>;