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authorMichael Neuling <mikey@neuling.org>2013-09-02 21:13:12 -0400
committerAlexander Graf <agraf@suse.de>2013-10-17 08:44:59 -0400
commit3b7834743f9492e3509930feb4ca47135905e640 (patch)
treecc9dcb90cbc264d317ccf9437ec6008744813cf2 /Documentation
parentd570142674890fe10b3d7d86aa105e3dfce1ddfa (diff)
KVM: PPC: Book3S HV: Reserve POWER8 space in get/set_one_reg
This reserves space in get/set_one_reg ioctl for the extra guest state needed for POWER8. It doesn't implement these at all, it just reserves them so that the ABI is defined now. A few things to note here: - This add *a lot* state for transactional memory. TM suspend mode, this is unavoidable, you can't simply roll back all transactions and store only the checkpointed state. I've added this all to get/set_one_reg (including GPRs) rather than creating a new ioctl which returns a struct kvm_regs like KVM_GET_REGS does. This means we if we need to extract the TM state, we are going to need a bucket load of IOCTLs. Hopefully most of the time this will not be needed as we can look at the MSR to see if TM is active and only grab them when needed. If this becomes a bottle neck in future we can add another ioctl to grab all this state in one go. - The TM state is offset by 0x80000000. - For TM, I've done away with VMX and FP and created a single 64x128 bit VSX register space. - I've left a space of 1 (at 0x9c) since Paulus needs to add a value which applies to POWER7 as well. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/virtual/kvm/api.txt39
1 files changed, 39 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index a89a5ee0b940..354a51ba456b 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1810,6 +1810,45 @@ registers, find a list below:
1810 PPC | KVM_REG_PPC_TLB3PS | 32 1810 PPC | KVM_REG_PPC_TLB3PS | 32
1811 PPC | KVM_REG_PPC_EPTCFG | 32 1811 PPC | KVM_REG_PPC_EPTCFG | 32
1812 PPC | KVM_REG_PPC_ICP_STATE | 64 1812 PPC | KVM_REG_PPC_ICP_STATE | 64
1813 PPC | KVM_REG_PPC_SPMC1 | 32
1814 PPC | KVM_REG_PPC_SPMC2 | 32
1815 PPC | KVM_REG_PPC_IAMR | 64
1816 PPC | KVM_REG_PPC_TFHAR | 64
1817 PPC | KVM_REG_PPC_TFIAR | 64
1818 PPC | KVM_REG_PPC_TEXASR | 64
1819 PPC | KVM_REG_PPC_FSCR | 64
1820 PPC | KVM_REG_PPC_PSPB | 32
1821 PPC | KVM_REG_PPC_EBBHR | 64
1822 PPC | KVM_REG_PPC_EBBRR | 64
1823 PPC | KVM_REG_PPC_BESCR | 64
1824 PPC | KVM_REG_PPC_TAR | 64
1825 PPC | KVM_REG_PPC_DPDES | 64
1826 PPC | KVM_REG_PPC_DAWR | 64
1827 PPC | KVM_REG_PPC_DAWRX | 64
1828 PPC | KVM_REG_PPC_CIABR | 64
1829 PPC | KVM_REG_PPC_IC | 64
1830 PPC | KVM_REG_PPC_VTB | 64
1831 PPC | KVM_REG_PPC_CSIGR | 64
1832 PPC | KVM_REG_PPC_TACR | 64
1833 PPC | KVM_REG_PPC_TCSCR | 64
1834 PPC | KVM_REG_PPC_PID | 64
1835 PPC | KVM_REG_PPC_ACOP | 64
1836 PPC | KVM_REG_PPC_TM_GPR0 | 64
1837 ...
1838 PPC | KVM_REG_PPC_TM_GPR31 | 64
1839 PPC | KVM_REG_PPC_TM_VSR0 | 128
1840 ...
1841 PPC | KVM_REG_PPC_TM_VSR63 | 128
1842 PPC | KVM_REG_PPC_TM_CR | 64
1843 PPC | KVM_REG_PPC_TM_LR | 64
1844 PPC | KVM_REG_PPC_TM_CTR | 64
1845 PPC | KVM_REG_PPC_TM_FPSCR | 64
1846 PPC | KVM_REG_PPC_TM_AMR | 64
1847 PPC | KVM_REG_PPC_TM_PPR | 64
1848 PPC | KVM_REG_PPC_TM_VRSAVE | 64
1849 PPC | KVM_REG_PPC_TM_VSCR | 32
1850 PPC | KVM_REG_PPC_TM_DSCR | 64
1851 PPC | KVM_REG_PPC_TM_TAR | 64
1813 1852
1814ARM registers are mapped using the lower 32 bits. The upper 16 of that 1853ARM registers are mapped using the lower 32 bits. The upper 16 of that
1815is the register group type, or coprocessor number: 1854is the register group type, or coprocessor number: