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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-14 18:23:32 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-14 18:23:32 -0500
commit37da7bbbe84fe9e8862940d3f9194fd27dce59bb (patch)
tree6c3fae910b4cfd4e2f9a1fdc035400cd4df78be3 /Documentation
parente7cf773d431a63a2417902696fcc9e0ebdc83bbe (diff)
parentdd63af108f0814f0b589659f4e55a7a5af3b7e53 (diff)
Merge tag 'tty-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver updates from Greg KH: "Here's the big tty/serial driver update for 3.19-rc1. There are a number of TTY core changes/fixes in here from Peter Hurley that have all been teted in linux-next for a long time now. There are also the normal serial driver updates as well, full details in the changelog below" * tag 'tty-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (219 commits) serial: pxa: hold port.lock when reporting modem line changes tty-hvsi_lib: Deletion of an unnecessary check before the function call "tty_kref_put" tty: Deletion of unnecessary checks before two function calls n_tty: Fix read_buf race condition, increment read_head after pushing data serial: of-serial: add PM suspend/resume support Revert "serial: of-serial: add PM suspend/resume support" Revert "serial: of-serial: fix up PM ops on no_console_suspend and port type" serial: 8250: don't attempt a trylock if in sysrq serial: core: Add big-endian iotype serial: samsung: use port->fifosize instead of hardcoded values serial: samsung: prefer to use fifosize from driver data serial: samsung: fix style problems serial: samsung: wait for transfer completion before clock disable serial: icom: fix error return code serial: tegra: clean up tty-flag assignments serial: Fix io address assign flow with Fintek PCI-to-UART Product serial: mxs-auart: fix tx_empty against shift register serial: mxs-auart: fix gpio change detection on interrupt serial: mxs-auart: Fix mxs_auart_set_ldisc() serial: 8250_dw: Use 64-bit access for OCTEON. ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/serial/bcm63xx-uart.txt30
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt10
-rw-r--r--Documentation/devicetree/bindings/serial/of-serial.txt1
-rw-r--r--Documentation/devicetree/bindings/serial/pl011.txt20
-rw-r--r--Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt69
-rw-r--r--Documentation/devicetree/bindings/serial/renesas,sci-serial.txt9
-rw-r--r--Documentation/devicetree/bindings/serial/sirf-uart.txt16
-rw-r--r--Documentation/serial/driver6
8 files changed, 129 insertions, 32 deletions
diff --git a/Documentation/devicetree/bindings/serial/bcm63xx-uart.txt b/Documentation/devicetree/bindings/serial/bcm63xx-uart.txt
new file mode 100644
index 000000000000..5c52e5eef16d
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/bcm63xx-uart.txt
@@ -0,0 +1,30 @@
1* BCM63xx UART
2
3Required properties:
4
5- compatible: "brcm,bcm6345-uart"
6
7- reg: The base address of the UART register bank.
8
9- interrupts: A single interrupt specifier.
10
11- clocks: Clock driving the hardware; used to figure out the baud rate
12 divisor.
13
14Example:
15
16 uart0: serial@14e00520 {
17 compatible = "brcm,bcm6345-uart";
18 reg = <0x14e00520 0x18>;
19 interrupt-parent = <&periph_intc>;
20 interrupts = <2>;
21 clocks = <&periph_clk>;
22 };
23
24 clocks {
25 periph_clk: periph_clk@0 {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <54000000>;
29 };
30 };
diff --git a/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt
index 59a40f18d551..7c408c87e613 100644
--- a/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt
@@ -11,8 +11,13 @@ Required properties:
11- dma-names: "rx" for RX channel, "tx" for TX channel. 11- dma-names: "rx" for RX channel, "tx" for TX channel.
12 12
13Optional properties: 13Optional properties:
14- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines, 14- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines
15 for hardware flow control,
15 it also means you enable the DMA support for this UART. 16 it also means you enable the DMA support for this UART.
17- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
18 line respectively. It will use specified PIO instead of the peripheral
19 function pin for the USART feature.
20 If unsure, don't specify this property.
16 21
17Example: 22Example:
18auart0: serial@8006a000 { 23auart0: serial@8006a000 {
@@ -21,6 +26,9 @@ auart0: serial@8006a000 {
21 interrupts = <112>; 26 interrupts = <112>;
22 dmas = <&dma_apbx 8>, <&dma_apbx 9>; 27 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
23 dma-names = "rx", "tx"; 28 dma-names = "rx", "tx";
29 cts-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
30 dsr-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
31 dcd-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
24}; 32};
25 33
26Note: Each auart port should have an alias correctly numbered in "aliases" 34Note: Each auart port should have an alias correctly numbered in "aliases"
diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt
index 8c4fd0332028..b52b98234b9b 100644
--- a/Documentation/devicetree/bindings/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/of-serial.txt
@@ -10,6 +10,7 @@ Required properties:
10 - "ns16850" 10 - "ns16850"
11 - "nvidia,tegra20-uart" 11 - "nvidia,tegra20-uart"
12 - "nxp,lpc3220-uart" 12 - "nxp,lpc3220-uart"
13 - "ralink,rt2880-uart"
13 - "ibm,qpace-nwp-serial" 14 - "ibm,qpace-nwp-serial"
14 - "altr,16550-FIFO32" 15 - "altr,16550-FIFO32"
15 - "altr,16550-FIFO64" 16 - "altr,16550-FIFO64"
diff --git a/Documentation/devicetree/bindings/serial/pl011.txt b/Documentation/devicetree/bindings/serial/pl011.txt
index 52464918cfe2..ba3ecb8cb5a1 100644
--- a/Documentation/devicetree/bindings/serial/pl011.txt
+++ b/Documentation/devicetree/bindings/serial/pl011.txt
@@ -6,23 +6,35 @@ Required properties:
6- interrupts: exactly one interrupt specifier 6- interrupts: exactly one interrupt specifier
7 7
8Optional properties: 8Optional properties:
9- pinctrl: When present, must have one state named "default", 9- pinctrl:
10 When present, must have one state named "default",
10 and may contain a second name named "sleep". The former 11 and may contain a second name named "sleep". The former
11 state sets up pins for ordinary operation whereas 12 state sets up pins for ordinary operation whereas
12 the latter state will put the associated pins to sleep 13 the latter state will put the associated pins to sleep
13 when the UART is unused 14 when the UART is unused
14- clocks: When present, the first clock listed must correspond to 15- clocks:
16 When present, the first clock listed must correspond to
15 the clock named UARTCLK on the IP block, i.e. the clock 17 the clock named UARTCLK on the IP block, i.e. the clock
16 to the external serial line, whereas the second clock 18 to the external serial line, whereas the second clock
17 must correspond to the PCLK clocking the internal logic 19 must correspond to the PCLK clocking the internal logic
18 of the block. Just listing one clock (the first one) is 20 of the block. Just listing one clock (the first one) is
19 deprecated. 21 deprecated.
20- clocks-names: When present, the first clock listed must be named 22- clocks-names:
23 When present, the first clock listed must be named
21 "uartclk" and the second clock listed must be named 24 "uartclk" and the second clock listed must be named
22 "apb_pclk" 25 "apb_pclk"
23- dmas: When present, may have one or two dma channels. 26- dmas:
27 When present, may have one or two dma channels.
24 The first one must be named "rx", the second one 28 The first one must be named "rx", the second one
25 must be named "tx". 29 must be named "tx".
30- auto-poll:
31 Enables polling when using RX DMA.
32- poll-rate-ms:
33 Rate at which poll occurs when auto-poll is set,
34 default 100ms.
35- poll-timeout-ms:
36 Poll timeout when auto-poll is set, default
37 3000ms.
26 38
27See also bindings/arm/primecell.txt 39See also bindings/arm/primecell.txt
28 40
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
index ffa5b784c66e..a2114c217376 100644
--- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
@@ -27,27 +27,52 @@ Optional properties:
27- dmas: Should contain dma specifiers for transmit and receive channels 27- dmas: Should contain dma specifiers for transmit and receive channels
28- dma-names: Should contain "tx" for transmit and "rx" for receive channels 28- dma-names: Should contain "tx" for transmit and "rx" for receive channels
29 29
30Note: Aliases may be defined to ensure the correct ordering of the UARTs.
31The alias serialN will result in the UART being assigned port N. If any
32serialN alias exists, then an alias must exist for each enabled UART. The
33serialN aliases should be in a .dts file instead of in a .dtsi file.
34
30Examples: 35Examples:
31 36
32A uartdm v1.4 device with dma capabilities. 37- A uartdm v1.4 device with dma capabilities.
33 38
34serial@f991e000 { 39 serial@f991e000 {
35 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; 40 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
36 reg = <0xf991e000 0x1000>; 41 reg = <0xf991e000 0x1000>;
37 interrupts = <0 108 0x0>; 42 interrupts = <0 108 0x0>;
38 clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>; 43 clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>;
39 clock-names = "core", "iface"; 44 clock-names = "core", "iface";
40 dmas = <&dma0 0>, <&dma0 1>; 45 dmas = <&dma0 0>, <&dma0 1>;
41 dma-names = "tx", "rx"; 46 dma-names = "tx", "rx";
42}; 47 };
43 48
44A uartdm v1.3 device without dma capabilities and part of a GSBI complex. 49- A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
45 50
46serial@19c40000 { 51 serial@19c40000 {
47 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; 52 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
48 reg = <0x19c40000 0x1000>, 53 reg = <0x19c40000 0x1000>,
49 <0x19c00000 0x1000>; 54 <0x19c00000 0x1000>;
50 interrupts = <0 195 0x0>; 55 interrupts = <0 195 0x0>;
51 clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>; 56 clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
52 clock-names = "core", "iface"; 57 clock-names = "core", "iface";
53}; 58 };
59
60- serialN alias.
61
62 aliases {
63 serial0 = &uarta;
64 serial1 = &uartc;
65 serial2 = &uartb;
66 };
67
68 uarta: serial@12490000 {
69 status = "ok";
70 };
71
72 uartb: serial@16340000 {
73 status = "ok";
74 };
75
76 uartc: serial@1a240000 {
77 status = "ok";
78 };
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index b3556609a06f..ae73bb0e9ad9 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -4,8 +4,7 @@ Required properties:
4 4
5 - compatible: Must contain one of the following: 5 - compatible: Must contain one of the following:
6 6
7 - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. 7 - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.
8 - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
9 - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART. 8 - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
10 - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART. 9 - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
11 - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART. 10 - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
@@ -20,6 +19,12 @@ Required properties:
20 - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART. 19 - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART.
21 - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART. 20 - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART.
22 - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART. 21 - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART.
22 - "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART.
23 - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART.
24 - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART.
25 - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART.
26 - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
27 - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
23 - "renesas,scif" for generic SCIF compatible UART. 28 - "renesas,scif" for generic SCIF compatible UART.
24 - "renesas,scifa" for generic SCIFA compatible UART. 29 - "renesas,scifa" for generic SCIFA compatible UART.
25 - "renesas,scifb" for generic SCIFB compatible UART. 30 - "renesas,scifb" for generic SCIFB compatible UART.
diff --git a/Documentation/devicetree/bindings/serial/sirf-uart.txt b/Documentation/devicetree/bindings/serial/sirf-uart.txt
index a2dfc6522a91..3acdd969edf1 100644
--- a/Documentation/devicetree/bindings/serial/sirf-uart.txt
+++ b/Documentation/devicetree/bindings/serial/sirf-uart.txt
@@ -1,7 +1,9 @@
1* CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter * 1* CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
2 2
3Required properties: 3Required properties:
4- compatible : Should be "sirf,prima2-uart" or "sirf, prima2-usp-uart" 4- compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart",
5 "sirf,marco-uart" or "sirf,marco-bt-uart" which means
6 uart located in BT module and used for BT.
5- reg : Offset and length of the register set for the device 7- reg : Offset and length of the register set for the device
6- interrupts : Should contain uart interrupt 8- interrupts : Should contain uart interrupt
7- fifosize : Should define hardware rx/tx fifo size 9- fifosize : Should define hardware rx/tx fifo size
@@ -31,3 +33,15 @@ usp@b0090000 {
31 rts-gpios = <&gpio 15 0>; 33 rts-gpios = <&gpio 15 0>;
32 cts-gpios = <&gpio 46 0>; 34 cts-gpios = <&gpio 46 0>;
33}; 35};
36
37for uart use in BT module,
38uart6: uart@11000000 {
39 cell-index = <6>;
40 compatible = "sirf,marco-bt-uart", "sirf,marco-uart";
41 reg = <0x11000000 0x1000>;
42 interrupts = <0 100 0>;
43 clocks = <&clks 138>, <&clks 140>, <&clks 141>;
44 clock-names = "uart", "general", "noc";
45 fifosize = <128>;
46 status = "disabled";
47}
diff --git a/Documentation/serial/driver b/Documentation/serial/driver
index ba64e4b892e9..c415b0ef4493 100644
--- a/Documentation/serial/driver
+++ b/Documentation/serial/driver
@@ -59,7 +59,9 @@ The core driver uses the info->tmpbuf_sem lock to prevent multi-threaded
59access to the info->tmpbuf bouncebuffer used for port writes. 59access to the info->tmpbuf bouncebuffer used for port writes.
60 60
61The port_sem semaphore is used to protect against ports being added/ 61The port_sem semaphore is used to protect against ports being added/
62removed or reconfigured at inappropriate times. 62removed or reconfigured at inappropriate times. Since v2.6.27, this
63semaphore has been the 'mutex' member of the tty_port struct, and
64commonly referred to as the port mutex (or port->mutex).
63 65
64 66
65uart_ops 67uart_ops
@@ -248,7 +250,7 @@ hardware.
248 Other flags may be used (eg, xon/xoff characters) if your 250 Other flags may be used (eg, xon/xoff characters) if your
249 hardware supports hardware "soft" flow control. 251 hardware supports hardware "soft" flow control.
250 252
251 Locking: none. 253 Locking: caller holds port->mutex
252 Interrupts: caller dependent. 254 Interrupts: caller dependent.
253 This call must not sleep 255 This call must not sleep
254 256