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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-08-16 09:41:08 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-08-22 15:17:18 -0400
commit11dd586421b3091007e6f084a9211f3baa66f9fc (patch)
tree5e4e33a7ed3d006065433b9d0fbe33ddb9273365 /Documentation
parente586e955aa47f9b4afe6e665798fd2cb074a90f4 (diff)
ASoC: omap-mcbsp: Add device tree bindings
Device tree support for McBSP modules on OMAP2+ SoC. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/sound/omap-mcbsp.txt45
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1* Texas Instruments OMAP2+ McBSP module
2
3Required properties:
4- compatible: "ti,omap2420-mcbsp" for McBSP on OMAP2420
5 "ti,omap2430-mcbsp" for McBSP on OMAP2430
6 "ti,omap3-mcbsp" for McBSP on OMAP3
7 "ti,omap4-mcbsp" for McBSP on OMAP4 and newer SoC
8- reg: Register location and size, for OMAP4+ as an array:
9 <MPU access base address, size>,
10 <L3 interconnect address, size>;
11- interrupts: Interrupt numbers for the McBSP port, as an array in case the
12 McBSP IP have more interrupt lines:
13 <OCP compliant irq>,
14 <TX irq>,
15 <RX irq>;
16- interrupt-parent: The parent interrupt controller
17- ti,buffer-size: Size of the FIFO on the port (OMAP2430 and newer SoC)
18- ti,hwmods: Name of the hwmod associated to the McBSP port
19
20Sidetone support for OMAP3 McBSP2 and 3 ports:
21- sidetone { }: Within this section the following parameters are required:
22- reg: Register location and size for the ST block
23- interrupts: The interrupt number for the ST block
24- interrupt-parent: The parent interrupt controller for the ST block
25
26Example:
27
28mcbsp2: mcbsp@49022000 {
29 compatible = "ti,omap3-mcbsp";
30 #address-cells = <1>;
31 #size-cells = <1>;
32 reg = <0x49022000 0xff>;
33 interrupts = <0 17 0x4>, /* OCP compliant interrup */
34 <0 62 0x4>, /* TX interrup */
35 <0 63 0x4>; /* RX interrup */
36 interrupt-parent = <&intc>;
37 ti,buffer-size = <1280>;
38 ti,hwmods = "mcbsp2";
39
40 sidetone {
41 reg = <0x49028000 0xff>;
42 interrupts = <0 4 0x4>;
43 interrupt-parent = <&intc>;
44 };
45};